[coreboot-gerrit] Patch set updated for coreboot: amd/model_fxx: Check FID&VID Support for the BSP (too)

[Urja Rannikko (urjaman@gmail.com)]

Urja Rannikko (urjaman at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12336

-gerrit

commit 66781acd7a9496ac597d87cadc875da20c2badcd
Author: Urja Rannikko <urjaman at gmail.com>
Date:   Thu Nov 5 19:24:11 2015 +0200

    amd/model_fxx: Check FID&VID Support for the BSP (too)
    
    Tested in the direction that now my Sempron 2800+ / K8V-X boots.
    Fixed coding style in the check in AP code too to make them
    identical.
    
    Change-Id: I76196176635bb0f6ac284c8cb3b72212774fdfe4
    Signed-off-by: Urja Rannikko <urjaman at gmail.com>
---
 src/cpu/amd/model_fxx/fidvid.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/cpu/amd/model_fxx/fidvid.c b/src/cpu/amd/model_fxx/fidvid.c
index a005c46..03415d1 100644
--- a/src/cpu/amd/model_fxx/fidvid.c
+++ b/src/cpu/amd/model_fxx/fidvid.c
@@ -356,9 +356,8 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
 	u32 fid_max;
 	int loop;
 
-	if((cpuid_edx(0x80000007)&0x06)!=0x06) {
+	if ((cpuid_edx(0x80000007) & 0x06) != 0x06)
 		return; /* FID/VID change not supported */
-	}
 
 	msr = rdmsr(0xc0010042);
 	fid_max = ((msr.lo >> 16) & 0x3f);	/* max fid */
@@ -536,6 +535,9 @@ static void init_fidvid_bsp(unsigned bsp_apicid)
 	unsigned i;
 #endif
 
+	if ((cpuid_edx(0x80000007) & 0x06) != 0x06)
+		return; /* FID/VID change not supported */
+
 	msr_t msr;
 	msr = rdmsr(0xc0010042);
 	fid_max = ((msr.lo >> 16) & 0x3f);	/* max fid */