[coreboot-gerrit] Patch set updated for coreboot: fsp_model_406dx: use external microcode .h files for rangeley

[Martin Roth (martinroth@google.com)]

Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12335

-gerrit

commit 49ddc564903bdb2d84a4f5b23b779d8f346320ed
Author: Martin Roth <martinroth at google.com>
Date:   Thu Nov 5 09:00:20 2015 -0700

    fsp_model_406dx: use external microcode .h files for rangeley
    
    The microcode for the Rangeley chip is supplied as .h files in the
    Rangeley FSP package.
    
    Change-Id: I30e7436f26a247bc9431f249becfa5fe8c581be7
    Signed-off-by: Martin Roth <martinroth at google.com>
---
 src/cpu/intel/fsp_model_406dx/Kconfig      | 7 +++++++
 src/cpu/intel/fsp_model_406dx/Makefile.inc | 3 ---
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig
index 5827c84..87c772a 100644
--- a/src/cpu/intel/fsp_model_406dx/Kconfig
+++ b/src/cpu/intel/fsp_model_406dx/Kconfig
@@ -33,6 +33,9 @@ config CPU_SPECIFIC_OPTIONS
 	select TSC_SYNC_MFENCE
 	select LAPIC_MONOTONIC_TIMER
 
+	# Microcode header files are delivered in FSP package
+	select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN
+
 choice
 	prompt "Rangeley CPU Stepping"
 	default FSP_MODEL_406DX_B0
@@ -58,4 +61,8 @@ config CPU_MICROCODE_CBFS_LOC
 	depends on SUPPORT_CPU_UCODE_IN_CBFS
 	default 0xfff60040
 
+config CPU_MICROCODE_HEADER_FILES
+	string
+	default "../intel/cpu/rangeley/microcode/microcode-m01406d000e.h ../intel/cpu/rangeley/microcode/microcode-m01406d811d.h "
+
 endif #CPU_INTEL_FSP_MODEL_406DX
diff --git a/src/cpu/intel/fsp_model_406dx/Makefile.inc b/src/cpu/intel/fsp_model_406dx/Makefile.inc
index 7e18f1b..bb534a4 100644
--- a/src/cpu/intel/fsp_model_406dx/Makefile.inc
+++ b/src/cpu/intel/fsp_model_406dx/Makefile.inc
@@ -19,6 +19,3 @@ subdirs-y += ../../x86/name
 ramstage-y += acpi.c
 
 CPPFLAGS_romstage += -I$(src)/cpu/intel/fsp_model_406dx
-# We don't have microcode for this CPU
-# Use CONFIG_CPU_MICROCODE_CBFS_EXTERNAL with a binary microcode file
-# cpu_microcode_bins += ???