[coreboot-gerrit] Patch set updated for coreboot: AMD bettong: Fix the interrupt routing.
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Thu Nov 5 13:48:59 CET 2015
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11374
-gerrit
commit a9283086143f98d2aa0173d71c140cdcd27b4615
Author: zbao <fishbaozi at gmail.com>
Date: Thu Nov 5 19:33:53 2015 +0800
AMD bettong: Fix the interrupt routing.
The plugged devices on PCIe should use IOAPIC2 instead of standard
IOAPIC1. The entries in IOAPIC2 count from the end of IOAPIC1.
The unchanged code worked because the OS uses MSI instead APIC.
To test that, boot linux with parameter pci=nomsi and see if the devices
like NIC work well as they do without the booting parameter.
Change-Id: I893e73f2aab3227381e44406fa285613e4ba2904
Signed-off-by: Zheng Bao <zheng.bao at amd.com>
Signed-off-by: Zheng Bao <fishbaozi at gmail.com>
---
src/mainboard/amd/bettong/acpi/routing.asl | 88 ++++++++++++++++------
.../amd/pi/00660F01/acpi/northbridge.asl | 35 +++++++++
2 files changed, 98 insertions(+), 25 deletions(-)
diff --git a/src/mainboard/amd/bettong/acpi/routing.asl b/src/mainboard/amd/bettong/acpi/routing.asl
index 51f0205..bcf0e90 100644
--- a/src/mainboard/amd/bettong/acpi/routing.asl
+++ b/src/mainboard/amd/bettong/acpi/routing.asl
@@ -105,12 +105,9 @@ Name(APR0, Package(){
Package(){0x0013FFFF, 0, 0, 18 },
Package(){0x0013FFFF, 1, 0, 17 },
- Package(){0x0016FFFF, 0, 0, 18 },
- Package(){0x0016FFFF, 1, 0, 17 },
-
/* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
- Package(){0x0010FFFF, 0, 0, 0x12},
- Package(){0x0010FFFF, 1, 0, 0x11},
+ Package(){0x0010FFFF, 0, 0, 18},
+ Package(){0x0010FFFF, 1, 0, 17},
/* Bus 0, Dev 17 - SATA controller */
Package(){0x0011FFFF, 0, 0, 19 },
@@ -144,10 +141,10 @@ Name(PS4, Package(){
})
Name(APS4, Package(){
/* PCIe slot - Hooked to PCIe slot 4 */
- Package(){0x0000FFFF, 0, 0, 16 },
- Package(){0x0000FFFF, 1, 0, 17 },
- Package(){0x0000FFFF, 2, 0, 18 },
- Package(){0x0000FFFF, 3, 0, 19 },
+ Package(){0x0000FFFF, 0, 0, 24 },
+ Package(){0x0000FFFF, 1, 0, 25 },
+ Package(){0x0000FFFF, 2, 0, 26 },
+ Package(){0x0000FFFF, 3, 0, 27 },
})
/* GPP 0 */
@@ -158,10 +155,10 @@ Name(PS5, Package(){
Package(){0x0000FFFF, 3, INTA, 0 },
})
Name(APS5, Package(){
- Package(){0x0000FFFF, 0, 0, 17 },
- Package(){0x0000FFFF, 1, 0, 18 },
- Package(){0x0000FFFF, 2, 0, 19 },
- Package(){0x0000FFFF, 3, 0, 16 },
+ Package(){0x0000FFFF, 0, 0, 28 },
+ Package(){0x0000FFFF, 1, 0, 29 },
+ Package(){0x0000FFFF, 2, 0, 30 },
+ Package(){0x0000FFFF, 3, 0, 31 },
})
/* GPP 1 */
@@ -172,10 +169,10 @@ Name(PS6, Package(){
Package(){0x0000FFFF, 3, INTB, 0 },
})
Name(APS6, Package(){
- Package(){0x0000FFFF, 0, 0, 18 },
- Package(){0x0000FFFF, 1, 0, 19 },
- Package(){0x0000FFFF, 2, 0, 16 },
- Package(){0x0000FFFF, 3, 0, 17 },
+ Package(){0x0000FFFF, 0, 0, 32 },
+ Package(){0x0000FFFF, 1, 0, 33 },
+ Package(){0x0000FFFF, 2, 0, 34 },
+ Package(){0x0000FFFF, 3, 0, 35 },
})
/* GPP 2 */
@@ -186,10 +183,10 @@ Name(PS7, Package(){
Package(){0x0000FFFF, 3, INTC, 0 },
})
Name(APS7, Package(){
- Package(){0x0000FFFF, 0, 0, 19 },
- Package(){0x0000FFFF, 1, 0, 16 },
- Package(){0x0000FFFF, 2, 0, 17 },
- Package(){0x0000FFFF, 3, 0, 18 },
+ Package(){0x0000FFFF, 0, 0, 36 },
+ Package(){0x0000FFFF, 1, 0, 37 },
+ Package(){0x0000FFFF, 2, 0, 38 },
+ Package(){0x0000FFFF, 3, 0, 39 },
})
/* GPP 3 */
@@ -200,9 +197,50 @@ Name(PS8, Package(){
Package(){0x0000FFFF, 3, INTD, 0 },
})
Name(APS8, Package(){
- Package(){0x0000FFFF, 0, 0, 16 },
- Package(){0x0000FFFF, 1, 0, 17 },
- Package(){0x0000FFFF, 2, 0, 18 },
- Package(){0x0000FFFF, 3, 0, 18 },
+ Package(){0x0000FFFF, 0, 0, 40 },
+ Package(){0x0000FFFF, 1, 0, 41 },
+ Package(){0x0000FFFF, 2, 0, 42 },
+ Package(){0x0000FFFF, 3, 0, 43 },
})
+/* GFX 2 */
+Name(PSA, Package(){
+ Package(){0x0000FFFF, 0, INTA, 0 },
+ Package(){0x0000FFFF, 1, INTB, 0 },
+ Package(){0x0000FFFF, 2, INTC, 0 },
+ Package(){0x0000FFFF, 3, INTD, 0 },
+})
+Name(APSA, Package(){
+ Package(){0x0000FFFF, 0, 0, 52 },
+ Package(){0x0000FFFF, 1, 0, 53 },
+ Package(){0x0000FFFF, 2, 0, 54 },
+ Package(){0x0000FFFF, 3, 0, 55 },
+})
+
+/* GFX 3 */
+Name(PSB, Package(){
+ Package(){0x0000FFFF, 0, INTA, 0 },
+ Package(){0x0000FFFF, 1, INTB, 0 },
+ Package(){0x0000FFFF, 2, INTC, 0 },
+ Package(){0x0000FFFF, 3, INTD, 0 },
+})
+Name(APSB, Package(){
+ Package(){0x0000FFFF, 0, 0, 27 },
+ Package(){0x0000FFFF, 1, 0, 24 },
+ Package(){0x0000FFFF, 2, 0, 25 },
+ Package(){0x0000FFFF, 3, 0, 26 },
+})
+
+/* GFX 4 */
+Name(PSC, Package(){
+ Package(){0x0000FFFF, 0, INTA, 0 },
+ Package(){0x0000FFFF, 1, INTB, 0 },
+ Package(){0x0000FFFF, 2, INTC, 0 },
+ Package(){0x0000FFFF, 3, INTD, 0 },
+})
+Name(APSC, Package(){
+ Package(){0x0000FFFF, 0, 0, 31 },
+ Package(){0x0000FFFF, 1, 0, 28 },
+ Package(){0x0000FFFF, 2, 0, 29 },
+ Package(){0x0000FFFF, 3, 0, 30 },
+})
diff --git a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
index 4e6d13e..cde5182 100644
--- a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
@@ -94,3 +94,38 @@ Device(PBR8) {
Return (PS8) /* PIC Mode */
} /* end _PRT */
} /* end PBR8 */
+
+/* GFX 1 */
+Device(PBR9) {
+ Name(_ADR, 0x00030002)
+} /* end PBR8 */
+
+/* GFX 2 */
+Device(PBRA) {
+ Name(_ADR, 0x00030003)
+ Name(_PRW, Package() {0x18, 4})
+ Method(_PRT,0) {
+ If(PMOD){ Return(APSA) } /* APIC mode */
+ Return (PSA) /* PIC Mode */
+ } /* end _PRT */
+} /* end PBR8 */
+
+/* GFX 3 */
+Device(PBRB) {
+ Name(_ADR, 0x00030004)
+ Name(_PRW, Package() {0x18, 4})
+ Method(_PRT,0) {
+ If(PMOD){ Return(APSB) } /* APIC mode */
+ Return (PSB) /* PIC Mode */
+ } /* end _PRT */
+} /* end PBR8 */
+
+/* GFX 4 */
+Device(PBRC) {
+ Name(_ADR, 0x00030005)
+ Name(_PRW, Package() {0x18, 4})
+ Method(_PRT,0) {
+ If(PMOD){ Return(APSC) } /* APIC mode */
+ Return (PSC) /* PIC Mode */
+ } /* end _PRT */
+} /* end PBR8 */
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