[coreboot-gerrit] New patch to review for coreboot: nb/intel/sandybridge: Limit GFX workaround to Sandy Bridge

[Nico Huber (nico.h@gmx.de)]

Nico Huber (nico.h at gmx.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12326

-gerrit

commit 237bb37c88faf6f617ef2f6e86e9b15dcda24aa2
Author: Nico Huber <nico.huber at secunet.com>
Date:   Wed Nov 4 15:46:00 2015 +0100

    nb/intel/sandybridge: Limit GFX workaround to Sandy Bridge
    
    The touched workaround for Sandy Bridge reserves two memory regions that
    could cause graphics corruption if mapped by the integrated graphics
    device. To the best of our knowledge, the workaround is not needed for
    Ivy Bridge revisions.
    
    Tested on kontron/ktqm77 (Ivy Bridge): Booted Linux and checked the
    memory regions are not reserved. Couldn't test on Sandy Bridge, due to
    lack of hardware.
    
    Change-Id: I4273d1d804b490cf93c23426782eb1ffaf29f7d4
    Signed-off-by: Nico Huber <nico.huber at secunet.com>
---
 src/northbridge/intel/sandybridge/northbridge.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 09830de..96ddc0b 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -124,9 +124,11 @@ static void add_fixed_resources(struct device *dev, int index)
 			CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE >> 10);
 #endif
 
-	/* Required for SandyBridge sighting 3715511 */
-	bad_ram_resource(dev, index++, 0x20000000 >> 10, 0x00200000 >> 10);
-	bad_ram_resource(dev, index++, 0x40000000 >> 10, 0x00200000 >> 10);
+	if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_SNB) {
+		/* Required for SandyBridge sighting 3715511 */
+		bad_ram_resource(dev, index++, 0x20000000 >> 10, 0x00200000 >> 10);
+		bad_ram_resource(dev, index++, 0x40000000 >> 10, 0x00200000 >> 10);
+	}
 }
 
 static void pci_domain_set_resources(device_t dev)