[coreboot-gerrit] New patch to review for coreboot: mainboard/asus: Add F2A85-M PRO variant to F2A85-M.

Denis Carikli (GNUtoo@no-log.org) gerrit at coreboot.org
Tue Nov 3 19:21:40 CET 2015


Denis Carikli (GNUtoo at no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12301

-gerrit

commit f229f757f4022a59311b53484c7599a0cf019257
Author: Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
Date:   Sun Jul 26 19:57:51 2015 +0200

    mainboard/asus: Add F2A85-M PRO variant to F2A85-M.
    
    Change-Id: I78389dc1fd19a2354daec0484042940cf8b490ae
    Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
---
 src/mainboard/asus/f2a85-m_pro/BiosCallOuts.c      |   1 +
 src/mainboard/asus/f2a85-m_pro/Kconfig             |  93 ++++++++++++++
 src/mainboard/asus/f2a85-m_pro/Kconfig.name        |   2 +
 src/mainboard/asus/f2a85-m_pro/Makefile.inc        |  26 ++++
 src/mainboard/asus/f2a85-m_pro/OptionsIds.h        |   1 +
 src/mainboard/asus/f2a85-m_pro/PlatformGnbPcie.c   |   1 +
 .../asus/f2a85-m_pro/PlatformGnbPcieComplex.h      |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi/AmdImc.asl     |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi/cpstate.asl    |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi/gpe.asl        |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi/mainboard.asl  |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi/routing.asl    |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi/sata.asl       |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi/si.asl         |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi/sleep.asl      |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi/superio.asl    |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi/thermal.asl    |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi/usb_oc.asl     |   1 +
 src/mainboard/asus/f2a85-m_pro/acpi_tables.c       |   1 +
 src/mainboard/asus/f2a85-m_pro/board_info.txt      |   7 ++
 src/mainboard/asus/f2a85-m_pro/buildOpts.c         |   1 +
 src/mainboard/asus/f2a85-m_pro/cmos.layout         |  79 ++++++++++++
 src/mainboard/asus/f2a85-m_pro/devicetree.cb       | 136 +++++++++++++++++++++
 src/mainboard/asus/f2a85-m_pro/dsdt.asl            |   1 +
 src/mainboard/asus/f2a85-m_pro/irq_tables.c        |   1 +
 src/mainboard/asus/f2a85-m_pro/mainboard.c         |   1 +
 src/mainboard/asus/f2a85-m_pro/mptable.c           |   1 +
 src/mainboard/asus/f2a85-m_pro/romstage.c          |   1 +
 28 files changed, 365 insertions(+)

diff --git a/src/mainboard/asus/f2a85-m_pro/BiosCallOuts.c b/src/mainboard/asus/f2a85-m_pro/BiosCallOuts.c
new file mode 100644
index 0000000..afa69bb
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/BiosCallOuts.c
@@ -0,0 +1 @@
+#include "../f2a85-m/BiosCallOuts.c"
diff --git a/src/mainboard/asus/f2a85-m_pro/Kconfig b/src/mainboard/asus/f2a85-m_pro/Kconfig
new file mode 100644
index 0000000..b437ed6
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/Kconfig
@@ -0,0 +1,93 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2012 Advanced Micro Devices, Inc.
+# Copyright (C) 2012 Rudolf Marek <r.marek at assembler.cz>
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc.
+#
+
+if BOARD_ASUS_F2A85_M_PRO
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select CPU_AMD_AGESA_FAMILY15_TN
+	select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
+	select SOUTHBRIDGE_AMD_AGESA_HUDSON
+	select HAVE_OPTION_TABLE
+	select HAVE_PIRQ_TABLE
+	select HAVE_MP_TABLE
+	select HAVE_ACPI_TABLES
+	select SUPERIO_ITE_IT8728F
+	select BOARD_ROMSIZE_KB_8192
+	select GFXUMA
+	select HUDSON_DISABLE_IMC
+
+choice
+	prompt "DDR3 memory voltage"
+	default BOARD_ASUS_F2A85_M_PRO_DDR3_VOLT_150
+
+config BOARD_ASUS_F2A85_M_PRO_DDR3_VOLT_135
+	bool "1.35V"
+	help
+	  Set DRR3 memory voltage to 1.35V
+config BOARD_ASUS_F2A85_M_PRO_DDR3_VOLT_150
+	bool "1.50V"
+	help
+	  Set DRR3 memory voltage to 1.50V
+config BOARD_ASUS_F2A85_M_PRO_DDR3_VOLT_165
+	bool "1.65V"
+	help
+	  Set DRR3 memory voltage to 1.65V
+endchoice
+
+config BOARD_ASUS_F2A85_M_DDR3_VOLT_VAL
+	hex
+	default 0x9e if BOARD_ASUS_F2A85_M_PRO_DDR3_VOLT_135
+	default 0x0 if BOARD_ASUS_F2A85_M_PRO_DDR3_VOLT_150
+	default 0x1e if BOARD_ASUS_F2A85_M_PRO_DDR3_VOLT_165
+
+config MAINBOARD_DIR
+	string
+	default asus/f2a85-m_pro
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "F2A85-M_PRO"
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x200000
+
+config MAX_CPUS
+	int
+	default 4
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+	bool
+	default n
+
+config IRQ_SLOT_COUNT
+	int
+	default 11
+
+config ONBOARD_VGA_IS_PRIMARY
+	bool
+	default y
+
+config VGA_BIOS_ID
+	string
+	default "1002,9993"
+
+endif # BOARD_ASUS_F2A85_M_PRO
diff --git a/src/mainboard/asus/f2a85-m_pro/Kconfig.name b/src/mainboard/asus/f2a85-m_pro/Kconfig.name
new file mode 100644
index 0000000..e4b8dfd
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/Kconfig.name
@@ -0,0 +1,2 @@
+config BOARD_ASUS_F2A85_M_PRO
+	bool "F2A85-M PRO"
diff --git a/src/mainboard/asus/f2a85-m_pro/Makefile.inc b/src/mainboard/asus/f2a85-m_pro/Makefile.inc
new file mode 100644
index 0000000..0008d6d
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/Makefile.inc
@@ -0,0 +1,26 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2012 Advanced Micro Devices, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc.
+#
+
+romstage-y += buildOpts.c
+romstage-y += BiosCallOuts.c
+romstage-y += PlatformGnbPcie.c
+
+ramstage-y += buildOpts.c
+ramstage-y += BiosCallOuts.c
+ramstage-y += PlatformGnbPcie.c
diff --git a/src/mainboard/asus/f2a85-m_pro/OptionsIds.h b/src/mainboard/asus/f2a85-m_pro/OptionsIds.h
new file mode 100644
index 0000000..c702a9c
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/OptionsIds.h
@@ -0,0 +1 @@
+#include "../f2a85-m/OptionsIds.h"
diff --git a/src/mainboard/asus/f2a85-m_pro/PlatformGnbPcie.c b/src/mainboard/asus/f2a85-m_pro/PlatformGnbPcie.c
new file mode 100644
index 0000000..d83a779
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/PlatformGnbPcie.c
@@ -0,0 +1 @@
+#include "../f2a85-m/PlatformGnbPcie.c"
diff --git a/src/mainboard/asus/f2a85-m_pro/PlatformGnbPcieComplex.h b/src/mainboard/asus/f2a85-m_pro/PlatformGnbPcieComplex.h
new file mode 100644
index 0000000..f6f4c9a
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/PlatformGnbPcieComplex.h
@@ -0,0 +1 @@
+#include "../f2a85-m/PlatformGnbPcieComplex.h"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi/AmdImc.asl b/src/mainboard/asus/f2a85-m_pro/acpi/AmdImc.asl
new file mode 100644
index 0000000..43c2428
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi/AmdImc.asl
@@ -0,0 +1 @@
+#include "../../f2a85-m/acpi/AmdImc.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi/cpstate.asl b/src/mainboard/asus/f2a85-m_pro/acpi/cpstate.asl
new file mode 100644
index 0000000..29c8d69
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi/cpstate.asl
@@ -0,0 +1 @@
+#include "../../f2a85-m/acpi/cpstate.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi/gpe.asl b/src/mainboard/asus/f2a85-m_pro/acpi/gpe.asl
new file mode 100644
index 0000000..4794311
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi/gpe.asl
@@ -0,0 +1 @@
+#include "../../f2a85-m/acpi/gpe.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi/mainboard.asl b/src/mainboard/asus/f2a85-m_pro/acpi/mainboard.asl
new file mode 100644
index 0000000..f81742e
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi/mainboard.asl
@@ -0,0 +1 @@
+#include "../../f2a85-m/acpi/mainboard.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi/routing.asl b/src/mainboard/asus/f2a85-m_pro/acpi/routing.asl
new file mode 100644
index 0000000..77a1f8a
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi/routing.asl
@@ -0,0 +1 @@
+#include "../../f2a85-m/acpi/routing.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi/sata.asl b/src/mainboard/asus/f2a85-m_pro/acpi/sata.asl
new file mode 100644
index 0000000..46bc2e6
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi/sata.asl
@@ -0,0 +1 @@
+#include "../../f2a85-m/acpi/sata.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi/si.asl b/src/mainboard/asus/f2a85-m_pro/acpi/si.asl
new file mode 100644
index 0000000..208e5c4
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi/si.asl
@@ -0,0 +1 @@
+#include "../../f2a85-m/acpi/si.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi/sleep.asl b/src/mainboard/asus/f2a85-m_pro/acpi/sleep.asl
new file mode 100644
index 0000000..67e4e2b
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi/sleep.asl
@@ -0,0 +1 @@
+#include "../../f2a85-m/acpi/sleep.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi/superio.asl b/src/mainboard/asus/f2a85-m_pro/acpi/superio.asl
new file mode 100644
index 0000000..88a494d
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi/superio.asl
@@ -0,0 +1 @@
+#include "../../f2a85-m/acpi/superio.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi/thermal.asl b/src/mainboard/asus/f2a85-m_pro/acpi/thermal.asl
new file mode 100644
index 0000000..3d529e5
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi/thermal.asl
@@ -0,0 +1 @@
+#include "../../f2a85-m/acpi/thermal.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi/usb_oc.asl b/src/mainboard/asus/f2a85-m_pro/acpi/usb_oc.asl
new file mode 100644
index 0000000..1b3fba0
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi/usb_oc.asl
@@ -0,0 +1 @@
+include "../../f2a85-m/acpi/usb_oc.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/acpi_tables.c b/src/mainboard/asus/f2a85-m_pro/acpi_tables.c
new file mode 100644
index 0000000..febb723
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/acpi_tables.c
@@ -0,0 +1 @@
+#include "../f2a85-m/acpi_tables.c"
diff --git a/src/mainboard/asus/f2a85-m_pro/board_info.txt b/src/mainboard/asus/f2a85-m_pro/board_info.txt
new file mode 100644
index 0000000..52c5819
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/board_info.txt
@@ -0,0 +1,7 @@
+Category: desktop
+Board URL: http://www.asus.com/Motherboards/F2A85M_PRO/
+ROM package: DIP8
+ROM protocol: SPI
+ROM socketed: y
+Flashrom support: y
+Release year:
diff --git a/src/mainboard/asus/f2a85-m_pro/buildOpts.c b/src/mainboard/asus/f2a85-m_pro/buildOpts.c
new file mode 100644
index 0000000..c9fc086
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/buildOpts.c
@@ -0,0 +1 @@
+#include "../f2a85-m/buildOpts.c"
diff --git a/src/mainboard/asus/f2a85-m_pro/cmos.layout b/src/mainboard/asus/f2a85-m_pro/cmos.layout
new file mode 100644
index 0000000..50750a8
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/cmos.layout
@@ -0,0 +1,79 @@
+#*****************************************************************************
+#
+#  This file is part of the coreboot project.
+#
+#  Copyright (C) 2012 Advanced Micro Devices, Inc.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc.
+#*****************************************************************************
+
+entries
+
+0          384       r       0        reserved_memory
+384          1       e       4        boot_option
+385          1       e       4        last_boot
+388          4       r       0        reboot_bits
+392          3       e       5        baud_rate
+395          1       e       1        hw_scrubber
+396          1       e       1        interleave_chip_selects
+397          2       e       8        max_mem_clock
+399          1       e       2        multi_core
+400          1       e       1        power_on_after_fail
+412          4       e       6        debug_level
+440          4       e       9        slow_cpu
+444          1       e       1        nmi
+445          1       e       1        iommu
+456          1       e       1        ECC_memory
+728        256       h       0        user_data
+984         16       h       0        check_sum
+# Reserve the extended AMD configuration registers
+1000        24       r       0        amd_reserved
+
+enumerations
+
+#ID value   text
+1     0     Disable
+1     1     Enable
+2     0     Enable
+2     1     Disable
+4     0     Fallback
+4     1     Normal
+5     0     115200
+5     1     57600
+5     2     38400
+5     3     19200
+5     4     9600
+5     5     4800
+5     6     2400
+5     7     1200
+6     6     Notice
+6     7     Info
+6     8     Debug
+6     9     Spew
+8     0     400Mhz
+8     1     333Mhz
+8     2     266Mhz
+8     3     200Mhz
+9     0     off
+9     1     87.5%
+9     2     75.0%
+9     3     62.5%
+9     4     50.0%
+9     5     37.5%
+9     6     25.0%
+9     7     12.5%
+
+checksums
+
+checksum 392 983 984
diff --git a/src/mainboard/asus/f2a85-m_pro/devicetree.cb b/src/mainboard/asus/f2a85-m_pro/devicetree.cb
new file mode 100644
index 0000000..4562557
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/devicetree.cb
@@ -0,0 +1,136 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2012 Advanced Micro Devices, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc.
+#
+chip northbridge/amd/agesa/family15tn/root_complex
+
+	device cpu_cluster 0 on
+		chip cpu/amd/agesa/family15tn
+			device lapic 10 on end
+		end
+	end
+
+	device domain 0 on
+		subsystemid 0x1022 0x1410 inherit
+		chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
+
+			chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
+				device pci 0.0 on  end # Root Complex
+				device pci 1.0 on  end # Internal Graphics P2P bridge 0x99XX
+				device pci 1.1 on  end # Internal Multimedia
+				device pci 2.0 on  end # PCIE SLOT0 x16 blue
+				device pci 3.0 off end # unused?
+				device pci 4.0 on  end # PCIE 4x black
+				device pci 5.0 off end # unused?
+				device pci 6.0 off end # unused?
+				device pci 7.0 off end # LAN
+				device pci 8.0 off end # NB/SB Link P2P bridge
+			end	#chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
+
+			chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
+				device pci 10.0 on  end # XHCI HC0
+				device pci 10.1 on  end # XHCI HC1
+				device pci 11.0 on  end # SATA
+				device pci 12.0 on  end # USB
+				device pci 12.2 on  end # USB
+				device pci 13.0 on  end # USB
+				device pci 13.2 on  end # USB
+				device pci 14.0 on      # SMBUS
+					chip drivers/generic/generic #dimm 0
+						device i2c 50 on end # 7-bit SPD address
+					end
+					chip drivers/generic/generic #dimm 1
+						device i2c 51 on end # 7-bit SPD address
+					end
+				end # SM
+				device pci 14.1 off end # IDE	0x439c
+				device pci 14.2 on  end # HDA	0x4383
+				device pci 14.3 on      # LPC	0x439d
+					chip superio/ite/it8728f
+						register hwm_ctl_register = "0xc0"
+						register hwm_main_ctl_register = "0x33"
+						register hwm_adc_temp_chan_en_reg = "0x38"
+						register hwm_fan1_ctl_pwm = "0x00"
+						register hwm_fan2_ctl_pwm = "0x00"
+						register hwm_fan3_ctl_pwm = "0x00"
+
+						device pnp 2e.0 off #  Floppy
+							io 0x60 = 0x3f0
+							irq 0x70 = 6
+							drq 0x74 = 2
+						end
+						device pnp 2e.1 on #  Com1
+							io 0x60 = 0x3f8
+							irq 0x70 = 4
+						end
+						device pnp 2e.2 off #  Com2
+							io 0x60 = 0x2f8
+							irq 0x70 = 3
+						end
+						device pnp 2e.3 off #  Parallel Port
+							io 0x60 = 0x378
+							irq 0x70 = 7
+						end
+						device pnp 2e.4 on #  Env Controller
+							io 0x60 = 0x290
+							io 0x62 = 0x220
+							irq 0x70 = 0
+						end
+						device pnp 2e.5 on #  Keyboard
+							io 0x60 = 0x60
+							io 0x62 = 0x64
+							irq 0x70 = 1
+						end
+						device pnp 2e.6 off #  Mouse
+							irq 0x70 = 12
+						end
+						device pnp 2e.7 on #  GPIO
+							io 0x60 = 0x228 #SMI
+							io 0x62 = 0x300 #Simple I/O
+							io 0x64 = 0x238 #Phony resource IT8603E does not have it
+							irq 0x70 = 0
+						end
+						device pnp 2e.a off end #  CIR
+					end	#superio/ite/it8728f
+				end	#device pci 14.3 # LPC
+				device pci 14.4 on  end # PCI 0x4384
+				device pci 14.5 on  end # USB 2
+				device pci 14.6 off end # Gec
+				device pci 14.7 off end # SD
+				device pci 15.0 on end # PCIe 0 - onboard PCIe 1x
+				device pci 15.1 on end # PCIe 1 onboard gigabit
+				device pci 15.2 off end # unused
+				device pci 15.3 off end # unused
+
+			end	#chip southbridge/amd/hudson
+
+			device pci 18.0 on end
+			device pci 18.1 on end
+			device pci 18.2 on end
+			device pci 18.3 on end
+			device pci 18.4 on end
+			device pci 18.5 on end
+
+			register "spdAddrLookup" = "
+			{
+				{ {0xA0, 0xA4}, {0xA2, 0xA6}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
+				{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
+			}"
+
+		end	#chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
+	end	#domain
+end	#chip northbridge/amd/agesa/family15tn/root_complex
diff --git a/src/mainboard/asus/f2a85-m_pro/dsdt.asl b/src/mainboard/asus/f2a85-m_pro/dsdt.asl
new file mode 100644
index 0000000..b27b81d
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/dsdt.asl
@@ -0,0 +1 @@
+#include "../f2a85-m/dsdt.asl"
diff --git a/src/mainboard/asus/f2a85-m_pro/irq_tables.c b/src/mainboard/asus/f2a85-m_pro/irq_tables.c
new file mode 100644
index 0000000..7e6c693
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/irq_tables.c
@@ -0,0 +1 @@
+#include "../f2a85-m/irq_tables.c"
diff --git a/src/mainboard/asus/f2a85-m_pro/mainboard.c b/src/mainboard/asus/f2a85-m_pro/mainboard.c
new file mode 100644
index 0000000..d8cc9c8
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/mainboard.c
@@ -0,0 +1 @@
+#include "../f2a85-m/mainboard.c"
diff --git a/src/mainboard/asus/f2a85-m_pro/mptable.c b/src/mainboard/asus/f2a85-m_pro/mptable.c
new file mode 100644
index 0000000..1d0784d
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/mptable.c
@@ -0,0 +1 @@
+#include <mainboard/asus/f2a85-m/mptable.c>
diff --git a/src/mainboard/asus/f2a85-m_pro/romstage.c b/src/mainboard/asus/f2a85-m_pro/romstage.c
new file mode 100644
index 0000000..0062c87
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m_pro/romstage.c
@@ -0,0 +1 @@
+#include "../f2a85-m/romstage.c"



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