[coreboot-gerrit] New patch to review for coreboot: via/cx700: Fix hidden compile error and make sure it won't hide again

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12296

-gerrit

commit d750dd18eabdc2892b55fe09c2831d95ab0d0359
Author: Patrick Georgi <patrick at georgi-clan.de>
Date:   Sat Oct 31 16:12:51 2015 +0100

    via/cx700: Fix hidden compile error and make sure it won't hide again
    
    A wrong function name made an #ifdef'd code path not compile. Fix that,
    and also use IS_ENABLED() to make sure that such issues won't come up
    again there.
    
    Change-Id: Iccb98842dde498cce32cd86a770e22a506ad4cc2
    Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
---
 src/northbridge/via/cx700/raminit.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/northbridge/via/cx700/raminit.c b/src/northbridge/via/cx700/raminit.c
index 3c6b6d0..67b2fac 100644
--- a/src/northbridge/via/cx700/raminit.c
+++ b/src/northbridge/via/cx700/raminit.c
@@ -1254,14 +1254,14 @@ static void sdram_enable(const struct mem_controller *ctrl)
 		}
 	}
 
-#ifdef MEM_WIDTH_32BIT_MODE
-	/****************************************************************/
-	/*                      Set Dram 32bit Mode                     */
-	/****************************************************************/
-	reg8 = pci_read_config8(MEMCTRL, 0x6c);
-	reg8 |= 0x20;
-	pci_write_config(MEMCTRL, 0x6c, reg8);
-#endif
+	if (IS_ENABLED(MEM_WIDTH_32BIT_MODE)) {
+		/********************************************************/
+		/*                  Set Dram 32bit Mode                 */
+		/********************************************************/
+		reg8 = pci_read_config8(MEMCTRL, 0x6c);
+		reg8 |= 0x20;
+		pci_write_config8(MEMCTRL, 0x6c, reg8);
+	}
 
 	/****************************************************************/
 	/* Find the DQSI Low/High bound and save it to Scratch register */