[coreboot-gerrit] New patch to review for coreboot: Needs Testing: VGA and GM45 textmode fixes

Nicky Sielicki (me@nicky.io) gerrit at coreboot.org
Mon Nov 2 00:01:01 CET 2015


Nicky Sielicki (me at nicky.io) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12293

-gerrit

commit def06e20d4e940f302a22028c30b6390ecf75b90
Author: Nicky Sielicki <me at nicky.io>
Date:   Sun Nov 1 16:51:19 2015 -0600

    Needs Testing: VGA and GM45 textmode fixes
    
    See thread here:
    http://www.coreboot.org/pipermail/coreboot/2015-October/080523.html
    
    VGA Documentation here:
    http://www.osdever.net/FreeVGA/vga/vga.htm#register
    
    Changes in src/drivers/pc80/vga/vga.c:
    	* Ensure CR lock bit isn't set before vga_textmode_init()
              and vga_set_mode()
    
            in src/northbridge/intel/gm45/gma.c
    	* Ensure screen disable sequencer register is unset after
    	  textmode init
    	* use sizeof() when looping over u8 cr registers.
    
    I'm unsure this would fix GM45 textmode graphics, but it's at
    least a start.
    
    Change-Id: Iae3d393ed4f39164c486672b08deb6187fd269ca
    Signed-off-by: Nicky Sielicki <me at nicky.io>
---
 src/drivers/pc80/vga/vga.c       | 8 ++++++++
 src/northbridge/intel/gm45/gma.c | 3 ++-
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/drivers/pc80/vga/vga.c b/src/drivers/pc80/vga/vga.c
index 740910c..e10b5b4 100644
--- a/src/drivers/pc80/vga/vga.c
+++ b/src/drivers/pc80/vga/vga.c
@@ -106,6 +106,10 @@ vga_mode_set(int hdisplay, int hblankstart, int hsyncstart, int hsyncend,
 	     int vsyncstart, int vsyncend, int vblankend, int vtotal,
 	     int stride)
 {
+	/* ensure everything is unlocked.
+	 * That's a 0 in the 7th bit of cr 0x11 */
+	vga_cr_write(0x11, vga_cr_read(0x11) & (~(0x1 << 7)));
+
 	/* htotal: 2080 */
 	htotal /= 8;
 	htotal -= 5;
@@ -291,6 +295,10 @@ vga_line_write(unsigned int line, const char *string)
 void
 vga_textmode_init(void)
 {
+	/* ensure everything is unlocked.
+	 * That's a 0 in the 7th bit of cr 0x11 */
+	vga_cr_write(0x11, vga_cr_read(0x11) & (~(0x1 << 7)));
+
 	vga_sr_write(0x00, 0x01); /* clear reset */
 	vga_sr_write(0x01, 0x00);
 
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index 8c97143..084094a 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -144,7 +144,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
 	};
 	vga_cr_write(0x11, 0);
 
-	for (i = 0; i <= 0x18; i++)
+	for (i = 0; i < sizeof(cr)/sizeof(u8); i++)
 		vga_cr_write(i, cr[i]);
 
 	power_port(mmio);
@@ -198,6 +198,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
 		write32(mmio + LGC_PALETTE(0) + 4 * i, i * 0x010101);
 #else
 	vga_textmode_init();
+	vga_sr_write(1, vga_sr_read(1) & ~0x20); // Enable screen.
 #endif
 
 	/* Find suitable divisors.  */



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