[coreboot-gerrit] New patch to review for coreboot: 078c187 intel: Remove pstate_coord_type.

Vladimir Serbinenko (phcoder@gmail.com) gerrit at coreboot.org
Wed May 27 22:58:53 CEST 2015


Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10329

-gerrit

commit 078c187eab60676418c33515c4ca1c53d517d0ba
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Wed May 27 21:07:09 2015 +0200

    intel: Remove pstate_coord_type.
    
    Not used anywhere.
    
    Change-Id: I9bab092d285aaebdf9283ba08e23197f9785b3a6
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/cpu/intel/fsp_model_206ax/chip.h             | 2 --
 src/cpu/intel/fsp_model_406dx/chip.h             | 2 --
 src/cpu/intel/haswell/chip.h                     | 2 --
 src/cpu/intel/model_2065x/chip.h                 | 2 --
 src/cpu/intel/model_206ax/chip.h                 | 2 --
 src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb | 1 -
 src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb | 1 -
 src/mainboard/google/butterfly/devicetree.cb     | 3 ---
 src/mainboard/google/link/devicetree.cb          | 3 ---
 src/mainboard/google/parrot/devicetree.cb        | 3 ---
 src/mainboard/google/stout/devicetree.cb         | 3 ---
 src/mainboard/kontron/ktqm77/devicetree.cb       | 3 ---
 src/mainboard/lenovo/t420s/devicetree.cb         | 3 ---
 src/mainboard/lenovo/t430s/devicetree.cb         | 3 ---
 src/mainboard/lenovo/t520/devicetree.cb          | 3 ---
 src/mainboard/lenovo/t530/devicetree.cb          | 3 ---
 src/mainboard/lenovo/x220/devicetree.cb          | 3 ---
 src/mainboard/lenovo/x230/devicetree.cb          | 3 ---
 src/mainboard/samsung/lumpy/devicetree.cb        | 3 ---
 19 files changed, 48 deletions(-)

diff --git a/src/cpu/intel/fsp_model_206ax/chip.h b/src/cpu/intel/fsp_model_206ax/chip.h
index 3041c53..759a74c 100644
--- a/src/cpu/intel/fsp_model_206ax/chip.h
+++ b/src/cpu/intel/fsp_model_206ax/chip.h
@@ -23,8 +23,6 @@
 struct cpu_intel_fsp_model_206ax_config {
 	u8 disable_acpi;	/* Do not generate CPU ACPI tables */
 
-	u8 pstate_coord_type;	/* Processor Coordination Type */
-
 	int c1_battery;		/* ACPI C1 on Battery Power */
 	int c2_battery;		/* ACPI C2 on Battery Power */
 	int c3_battery;		/* ACPI C3 on Battery Power */
diff --git a/src/cpu/intel/fsp_model_406dx/chip.h b/src/cpu/intel/fsp_model_406dx/chip.h
index 155c00c..a59e403 100644
--- a/src/cpu/intel/fsp_model_406dx/chip.h
+++ b/src/cpu/intel/fsp_model_406dx/chip.h
@@ -24,8 +24,6 @@
 #define SPEEDSTEP_APIC_MAGIC 0xACAC
 
 struct cpu_intel_fsp_model_406dx_config {
-	u8 pstate_coord_type;	/* Processor Coordination Type */
-
 	int c1_battery;		/* ACPI C1 on Battery Power */
 	int c2_battery;		/* ACPI C2 on Battery Power */
 	int c3_battery;		/* ACPI C3 on Battery Power */
diff --git a/src/cpu/intel/haswell/chip.h b/src/cpu/intel/haswell/chip.h
index 92823a6..89d168d 100644
--- a/src/cpu/intel/haswell/chip.h
+++ b/src/cpu/intel/haswell/chip.h
@@ -25,8 +25,6 @@ extern struct chip_operations cpu_intel_haswell_ops;
 struct cpu_intel_haswell_config {
 	u8 disable_acpi;	/* Do not generate CPU ACPI tables */
 
-	u8 pstate_coord_type;	/* Processor Coordination Type */
-
 	int c1_battery;		/* ACPI C1 on Battery Power */
 	int c2_battery;		/* ACPI C2 on Battery Power */
 	int c3_battery;		/* ACPI C3 on Battery Power */
diff --git a/src/cpu/intel/model_2065x/chip.h b/src/cpu/intel/model_2065x/chip.h
index f677611..550d478 100644
--- a/src/cpu/intel/model_2065x/chip.h
+++ b/src/cpu/intel/model_2065x/chip.h
@@ -23,8 +23,6 @@
 struct cpu_intel_model_2065x_config {
 	u8 disable_acpi;	/* Do not generate CPU ACPI tables */
 
-	u8 pstate_coord_type;	/* Processor Coordination Type */
-
 	int c1_battery;		/* ACPI C1 on Battery Power */
 	int c2_battery;		/* ACPI C2 on Battery Power */
 	int c3_battery;		/* ACPI C3 on Battery Power */
diff --git a/src/cpu/intel/model_206ax/chip.h b/src/cpu/intel/model_206ax/chip.h
index 10bca53..c690d52 100644
--- a/src/cpu/intel/model_206ax/chip.h
+++ b/src/cpu/intel/model_206ax/chip.h
@@ -23,8 +23,6 @@
 struct cpu_intel_model_206ax_config {
 	u8 disable_acpi;	/* Do not generate CPU ACPI tables */
 
-	u8 pstate_coord_type;	/* Processor Coordination Type */
-
 	int c1_battery;		/* ACPI C1 on Battery Power */
 	int c2_battery;		/* ACPI C2 on Battery Power */
 	int c3_battery;		/* ACPI C3 on Battery Power */
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
index 3c7641a..a3b8675 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
@@ -4,7 +4,6 @@ chip northbridge/intel/sandybridge
 			device lapic 0 on end
 		end
 		chip cpu/intel/model_206ax
-			register "pstate_coord_type" = "0xfe"
 			register "c1_acpower" = "1"
 			register "c2_acpower" = "3"
 			register "c3_acpower" = "5"
diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb
index 1c08359..10db86b 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb
@@ -4,7 +4,6 @@ chip northbridge/intel/sandybridge
 			device lapic 0 on end
 		end
 		chip cpu/intel/model_206ax
-			register "pstate_coord_type" = "0xfe"
 			register "c1_acpower" = "1"
 			register "c2_acpower" = "3"
 			register "c3_acpower" = "5"
diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb
index 90925b9..26baf41 100644
--- a/src/mainboard/google/butterfly/devicetree.cb
+++ b/src/mainboard/google/butterfly/devicetree.cb
@@ -22,9 +22,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe"
-
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
 			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)
diff --git a/src/mainboard/google/link/devicetree.cb b/src/mainboard/google/link/devicetree.cb
index 5333dfc..380f1c5 100644
--- a/src/mainboard/google/link/devicetree.cb
+++ b/src/mainboard/google/link/devicetree.cb
@@ -23,9 +23,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe"
-
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
 			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)
diff --git a/src/mainboard/google/parrot/devicetree.cb b/src/mainboard/google/parrot/devicetree.cb
index a4baafd..54fd51b 100644
--- a/src/mainboard/google/parrot/devicetree.cb
+++ b/src/mainboard/google/parrot/devicetree.cb
@@ -23,9 +23,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe"
-
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
 			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)
diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb
index 4ac89f6..68e53a8 100644
--- a/src/mainboard/google/stout/devicetree.cb
+++ b/src/mainboard/google/stout/devicetree.cb
@@ -19,9 +19,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe"
-
 			register "tcc_offset" = "5"	# TCC of 95C
 
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
diff --git a/src/mainboard/kontron/ktqm77/devicetree.cb b/src/mainboard/kontron/ktqm77/devicetree.cb
index 855fd5c..396450b 100644
--- a/src/mainboard/kontron/ktqm77/devicetree.cb
+++ b/src/mainboard/kontron/ktqm77/devicetree.cb
@@ -8,9 +8,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe" # TODO: This is never read.
-
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "4"	# ACPI(C2) = MWAIT(C3)
 			register "c3_acpower" = "0"	# ACPI(C3) = MWAIT(C7)
diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb
index 7fd6a53..0776fa1 100644
--- a/src/mainboard/lenovo/t420s/devicetree.cb
+++ b/src/mainboard/lenovo/t420s/devicetree.cb
@@ -25,9 +25,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe"
-
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
 			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)
diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb
index af3de6c..5d5c73f 100644
--- a/src/mainboard/lenovo/t430s/devicetree.cb
+++ b/src/mainboard/lenovo/t430s/devicetree.cb
@@ -25,9 +25,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe"
-
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
 			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb
index bf575d8..7642a8f 100644
--- a/src/mainboard/lenovo/t520/devicetree.cb
+++ b/src/mainboard/lenovo/t520/devicetree.cb
@@ -25,9 +25,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe"
-
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
 			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)
diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb
index d59524b..3550ede 100644
--- a/src/mainboard/lenovo/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/devicetree.cb
@@ -25,9 +25,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe"
-
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
 			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb
index 6eb3b15..75dae99 100644
--- a/src/mainboard/lenovo/x220/devicetree.cb
+++ b/src/mainboard/lenovo/x220/devicetree.cb
@@ -25,9 +25,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe"
-
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
 			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb
index c8274e2..cc51b1a 100644
--- a/src/mainboard/lenovo/x230/devicetree.cb
+++ b/src/mainboard/lenovo/x230/devicetree.cb
@@ -25,9 +25,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe"
-
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
 			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)
diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb
index 0372614..a3733b5 100644
--- a/src/mainboard/samsung/lumpy/devicetree.cb
+++ b/src/mainboard/samsung/lumpy/devicetree.cb
@@ -19,9 +19,6 @@ chip northbridge/intel/sandybridge
 			# Magic APIC ID to locate this chip
 			device lapic 0xACAC off end
 
-			# Coordinate with HW_ALL
-			register "pstate_coord_type" = "0xfe"
-
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
 			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)



More information about the coreboot-gerrit mailing list