[coreboot-gerrit] Patch set updated for coreboot: 07c8e0c x86: provide consistent cbmem_top() for CONFIG_LATE_CBMEM_INIT
Aaron Durbin (adurbin@chromium.org)
gerrit at coreboot.org
Tue May 26 18:41:16 CEST 2015
Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10313
-gerrit
commit 07c8e0c1b6016fedf295c2ec031cc1348548b115
Author: Aaron Durbin <adurbin at chromium.org>
Date: Tue May 26 11:15:45 2015 -0500
x86: provide consistent cbmem_top() for CONFIG_LATE_CBMEM_INIT
For x86 systems employing CONFIG_LATE_CBMEM_INIT, set_top_of_ram() is
called in ramstage to note the upper address of the 32-bit address
space. This in turn is consumed by cbmem. However, in this scenario
cbmem_top() cannot always be relied upon because get_top_of_ram()
doesn't return the same value provided to set_top_of_ram().
To fix the inconsistency in ramstage save the value passed in
to set_top_of_ram() and defer to it as the return value for
cbmem_top().
Change-Id: Ida796fb836c59b9776019e7f8b3f2cd71156f0e5
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/arch/x86/boot/cbmem.c | 20 +++++++++++++++++++-
src/include/cbmem.h | 3 +++
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c
index 9ee5db4..f48e46a 100644
--- a/src/arch/x86/boot/cbmem.c
+++ b/src/arch/x86/boot/cbmem.c
@@ -34,10 +34,23 @@ void __attribute__((weak)) backup_top_of_ram(uint64_t ramtop)
/* Do nothing. Chipset may have implementation to save ramtop in NVRAM. */
}
+static void *ramtop_pointer;
+
void set_top_of_ram(uint64_t ramtop)
{
backup_top_of_ram(ramtop);
- cbmem_set_top((void*)(uintptr_t)ramtop);
+ ramtop_pointer = (void *)(uintptr_t)ramtop;
+ cbmem_set_top(ramtop_pointer);
+}
+
+static inline void *saved_ramtop(void)
+{
+ return ramtop_pointer;
+}
+#else
+static inline void *saved_ramtop(void)
+{
+ return NULL;
}
#endif /* !__PRE_RAM__ */
@@ -50,6 +63,11 @@ unsigned long __attribute__((weak)) get_top_of_ram(void)
void *cbmem_top(void)
{
/* Top of cbmem is at lowest usable DRAM address below 4GiB. */
+ void *ptr = saved_ramtop();
+
+ if (ptr != NULL)
+ return ptr;
+
return (void *)get_top_of_ram();
}
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 20cc174..0a7ca89 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -221,6 +221,9 @@ void cbmem_list(void);
* early features like COLLECT_TIMESTAMPS and CBMEM_CONSOLE.
*/
#if IS_ENABLED(CONFIG_ARCH_X86) && IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
+/* Note that many of the current providers of get_top_of_ram() conditionally
+ * return 0 when the sleep type is non S3. i.e. cold and warm boots would
+ * return 0 from get_top_of_ram(). */
unsigned long get_top_of_ram(void);
void set_top_of_ram(uint64_t ramtop);
void backup_top_of_ram(uint64_t ramtop);
More information about the coreboot-gerrit
mailing list