[coreboot-gerrit] Patch merged into coreboot/master: d22206a superio/nct5104d: Handle shared GPIO/UART pins

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit d22206ac796b747ad1e790e2dc44cdf8832d66e8
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Mon May 11 20:58:18 2015 +0300

    superio/nct5104d: Handle shared GPIO/UART pins
    
    Routing is decided based on enabled logical/virtual devices.
    For a valid devicetree, one should have only one of SP3 and GPIO0,
    and only one of SP4 and GPIO1, enabled at a time in configuration.
    
    Change-Id: I02017786aba9dd22d12403aaa71d7641f5bbf997
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
    Reviewed-on: http://review.coreboot.org/10177
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Edward O'Callaghan <edward.ocallaghan at koparo.com>


See http://review.coreboot.org/10177 for details.

-gerrit