[coreboot-gerrit] Patch set updated for coreboot: b7c6a69 superio: Replace the indexed I/O functions
Dave Frodin (dave.frodin@se-eng.com)
gerrit at coreboot.org
Tue May 12 15:14:49 CEST 2015
Dave Frodin (dave.frodin at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10145
-gerrit
commit b7c6a699a6f820dcea2f89584cae3f54f5bb324e
Author: Dave Frodin <dave.frodin at se-eng.com>
Date: Tue May 12 06:53:11 2015 -0600
superio: Replace the indexed I/O functions
Replace the multiple indexed I/O read and write
functions with common functions.
Change-Id: Idfe7a8784c28d51b3fbcb2f4e26beaa0b91741a8
Signed-off-by: Dave Frodin <dave.frodin at se-eng.com>
---
src/include/device/pnp.h | 3 +++
src/superio/Makefile.inc | 1 +
src/superio/common/pnp_io.c | 31 ++++++++++++++++++++++++++++++
src/superio/fintek/f71869ad/f71869ad_hwm.c | 6 ------
src/superio/ite/it8716f/superio.c | 11 -----------
src/superio/ite/it8728f/it8728f_hwm.c | 6 ------
src/superio/smsc/lpc47b397/superio.c | 12 ------------
src/superio/winbond/w83627ehg/superio.c | 12 ------------
src/superio/winbond/w83627hf/superio.c | 12 ------------
9 files changed, 35 insertions(+), 59 deletions(-)
diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h
index d0d6fa3..df666a4 100644
--- a/src/include/device/pnp.h
+++ b/src/include/device/pnp.h
@@ -63,5 +63,8 @@ struct pnp_mode_ops {
void pnp_enter_conf_mode(device_t dev);
void pnp_exit_conf_mode(device_t dev);
+u8 pnp_read_index(u16 port, u8 reg);
+void pnp_write_index(u16 port, u8 reg, u8 value);
+
#endif /* ! __SIMPLE_DEVICE__ */
#endif /* DEVICE_PNP_H */
diff --git a/src/superio/Makefile.inc b/src/superio/Makefile.inc
index acaaacf..a60090e 100644
--- a/src/superio/Makefile.inc
+++ b/src/superio/Makefile.inc
@@ -29,3 +29,4 @@ subdirs-y += via
subdirs-y += winbond
ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += common/conf_mode.c
+ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += common/pnp_io.c
diff --git a/src/superio/common/pnp_io.c b/src/superio/common/pnp_io.c
new file mode 100644
index 0000000..bc1b463
--- /dev/null
+++ b/src/superio/common/pnp_io.c
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/pnp.h>
+
+u8 pnp_read_index(u16 port, u8 reg)
+{
+ outb(reg, port);
+ return inb(port + 1);
+}
+
+void pnp_write_index(u16 port, u8 reg, u8 value)
+{
+ outb(reg, port);
+ outb(value, port + 1);
+}
diff --git a/src/superio/fintek/f71869ad/f71869ad_hwm.c b/src/superio/fintek/f71869ad/f71869ad_hwm.c
index 25bc1ff..d4897c9 100644
--- a/src/superio/fintek/f71869ad/f71869ad_hwm.c
+++ b/src/superio/fintek/f71869ad/f71869ad_hwm.c
@@ -55,12 +55,6 @@
#define HWM_FAN1_SEG3_SPEED_COUNT 0xAC
#define HWM_FAN1_TEMP_MAP_SEL 0xAF
-static void pnp_write_index(u16 port, u8 reg, u8 value)
-{
- outb(reg, port);
- outb(value, port + 1);
-}
-
/* note: multifunc registers need to be tweaked before here */
void f71869ad_hwm_init(struct device *dev)
{
diff --git a/src/superio/ite/it8716f/superio.c b/src/superio/ite/it8716f/superio.c
index 56747ba..01736ee 100644
--- a/src/superio/ite/it8716f/superio.c
+++ b/src/superio/ite/it8716f/superio.c
@@ -32,17 +32,6 @@
#include "it8716f.h"
#if !CONFIG_SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL
-static void pnp_write_index(u16 port_base, u8 reg, u8 value)
-{
- outb(reg, port_base);
- outb(value, port_base + 1);
-}
-
-static u8 pnp_read_index(u16 port_base, u8 reg)
-{
- outb(reg, port_base);
- return inb(port_base + 1);
-}
static void init_ec(u16 base)
{
diff --git a/src/superio/ite/it8728f/it8728f_hwm.c b/src/superio/ite/it8728f/it8728f_hwm.c
index 23fa9e8..47dd274 100644
--- a/src/superio/ite/it8728f/it8728f_hwm.c
+++ b/src/superio/ite/it8728f/it8728f_hwm.c
@@ -35,12 +35,6 @@
#define HWM_FAN3_CTL_PWM 0x17 /* default 0x00 */
#define HWM_ADC_TEMP_CHAN_EN_REG 0x51 /* default 0x00 */
-static void pnp_write_index(u16 port, u8 reg, u8 value)
-{
- outb(reg, port);
- outb(value, port + 1);
-}
-
void it8728f_hwm_ec_init(struct device *dev)
{
struct superio_ite_it8728f_config *conf = dev->chip_info;
diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c
index 9c4a3b6..c3d0aee 100644
--- a/src/superio/smsc/lpc47b397/superio.c
+++ b/src/superio/smsc/lpc47b397/superio.c
@@ -31,18 +31,6 @@
#include <stdlib.h>
#include "lpc47b397.h"
-static void pnp_write_index(u16 port, u8 reg, u8 value)
-{
- outb(reg, port);
- outb(value, port + 1);
-}
-
-static u8 pnp_read_index(u16 port, u8 reg)
-{
- outb(reg, port);
- return inb(port + 1);
-}
-
static void enable_hwm_smbus(struct device *dev)
{
/* Enable SensorBus register access. */
diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c
index 73ab022..7c91a42 100644
--- a/src/superio/winbond/w83627ehg/superio.c
+++ b/src/superio/winbond/w83627ehg/superio.c
@@ -32,18 +32,6 @@
#include <stdlib.h>
#include "w83627ehg.h"
-static void pnp_write_index(u16 port, u8 reg, u8 value)
-{
- outb(reg, port);
- outb(value, port + 1);
-}
-
-static u8 pnp_read_index(u16 port, u8 reg)
-{
- outb(reg, port);
- return inb(port + 1);
-}
-
static void enable_hwm_smbus(struct device *dev)
{
u8 reg8;
diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c
index 2d69fad..9ac2683 100644
--- a/src/superio/winbond/w83627hf/superio.c
+++ b/src/superio/winbond/w83627hf/superio.c
@@ -32,18 +32,6 @@
#include <stdlib.h>
#include "w83627hf.h"
-static void pnp_write_index(u16 port, u8 reg, u8 value)
-{
- outb(reg, port);
- outb(value, port + 1);
-}
-
-static u8 pnp_read_index(u16 port, u8 reg)
-{
- outb(reg, port);
- return inb(port + 1);
-}
-
static void enable_hwm_smbus(struct device *dev)
{
u8 reg8;
More information about the coreboot-gerrit
mailing list