[coreboot-gerrit] New patch to review for coreboot: 14dab9a cache: Add arch_program_segment_loaded call to arm and arm64

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10173

-gerrit

commit 14dab9ae7464b6022533e678c227f11b78967df4
Author: Furquan Shaikh <furquan at google.com>
Date:   Wed Mar 18 11:27:25 2015 -0700

    cache: Add arch_program_segment_loaded call to arm and arm64
    
    arch_program_segment_loaded ensures that the program segment loaded is
    synced back from the cache to PoC. dcache_flush_all on arm64 does not
    guarantee PoC in case of MP systems. Thus, it is important to track
    and sync back all the required segments using
    arch_program_segment_loaded. Use this function in rmodules as well
    instead of cache_sync_instructions which guarantees sync upto PoC.
    
    BUG=chrome-os-partner:37546
    BRANCH=None
    TEST=Boots into depthcharge on foster
    
    Change-Id: I64c2dd5e40ea59fa31f300174ca0d0aebcf8041d
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 35ba0b882b86ff2c29ac766e1d65f403c8346247
    Original-Change-Id: I964aa09f0cafdaab170606cd4b8f2e027698aee7
    Original-Signed-off-by: Furquan Shaikh <furquan at google.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/260908
    Original-Reviewed-by: Furquan Shaikh <furquan at chromium.org>
    Original-Tested-by: Furquan Shaikh <furquan at chromium.org>
    Original-Commit-Queue: Furquan Shaikh <furquan at chromium.org>
    Original-Trybot-Ready: Furquan Shaikh <furquan at chromium.org>
---
 src/arch/arm/armv7/cache.c   | 10 ++++++++++
 src/arch/arm64/armv8/cache.c | 12 ++++++++++++
 2 files changed, 22 insertions(+)

diff --git a/src/arch/arm/armv7/cache.c b/src/arch/arm/armv7/cache.c
index 1f762b8..eea514b 100644
--- a/src/arch/arm/armv7/cache.c
+++ b/src/arch/arm/armv7/cache.c
@@ -34,6 +34,7 @@
 #include <stdint.h>
 
 #include <arch/cache.h>
+#include <program_loading.h>
 
 void tlb_invalidate_all(void)
 {
@@ -155,3 +156,12 @@ void cache_sync_instructions(void)
 	dsb();
 	isb();
 }
+
+/*
+ * For each segment of a program loaded this function is called
+ * to invalidate caches for the addresses of the loaded segment
+ */
+void arch_segment_loaded(uintptr_t start, size_t size, int flags)
+{
+	cache_sync_instructions();
+}
diff --git a/src/arch/arm64/armv8/cache.c b/src/arch/arm64/armv8/cache.c
index db9b388..95f2890 100644
--- a/src/arch/arm64/armv8/cache.c
+++ b/src/arch/arm64/armv8/cache.c
@@ -36,6 +36,7 @@
 #include <arch/cache.h>
 #include <arch/cache_helpers.h>
 #include <arch/lib_helpers.h>
+#include <program_loading.h>
 
 void tlb_invalidate_all(void)
 {
@@ -147,3 +148,14 @@ void cache_sync_instructions(void)
 	flush_dcache_all(DCCISW); /* includes trailing DSB (in assembly) */
 	icache_invalidate_all(); /* includdes leading DSB and trailing ISB. */
 }
+
+
+/*
+ * For each segment of a program loaded this function is called
+ * to invalidate caches for the addresses of the loaded segment
+ */
+void arch_segment_loaded(uintptr_t start, size_t size, int flags)
+{
+	dcache_clean_invalidate_by_mva((void *)start, size);
+	icache_invalidate_all();
+}