[coreboot-gerrit] New patch to review for coreboot: 967f74f intel/fsp_baytrail: Always log PcdEnableLpe and PcdeMMCBootMode
David Imhoff (dimhoff_devel@xs4all.nl)
gerrit at coreboot.org
Sun May 10 17:13:48 CEST 2015
David Imhoff (dimhoff_devel at xs4all.nl) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10164
-gerrit
commit 967f74fe85b3d8ac44eb4861bb34579db8c3051b
Author: David Imhoff <dimhoff_devel at xs4all.nl>
Date: Sun May 10 15:15:25 2015 +0200
intel/fsp_baytrail: Always log PcdEnableLpe and PcdeMMCBootMode
Log the values of PcdEnableLpe and PcdeMMCBootMode even if they are
outside of the expected range.
TEST=Intel/MinnowMax
Change-Id: Ie0aea4287234b23d4e9852f3991dcc78ce8103d9
Signed-off-by: David Imhoff <dimhoff_devel at xs4all.nl>
---
src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
index 5bfcfd5..1a3eda4 100644
--- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
+++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
@@ -206,10 +206,17 @@ static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U
if (UpdData->PcdEnableLpe < sizeof(acpi_pci_mode_strings) / sizeof (char *))
printk(FSP_INFO_LEVEL, "Lpe:\t\t\t%s\n",
acpi_pci_mode_strings[UpdData->PcdEnableLpe]);
+ else
+ printk(FSP_INFO_LEVEL, "Lpe:\t\t\tUnknown (0x%02x)\n",
+ UpdData->PcdEnableLpe);
if (UpdData->PcdeMMCBootMode < sizeof(emmc_mode_strings) / sizeof (char *))
- printk(FSP_INFO_LEVEL, "eMMC Mode:\t\t%s",
+ printk(FSP_INFO_LEVEL, "eMMC Mode:\t\t%s\n",
emmc_mode_strings[UpdData->PcdeMMCBootMode]);
+ else
+ printk(FSP_INFO_LEVEL, "eMMC Mode:\t\tUnknown (0x%02x)\n",
+ UpdData->PcdeMMCBootMode);
+
if (UpdData->PcdEnableSata)
printk(FSP_INFO_LEVEL, "SATA Mode:\t\t%s\n",
More information about the coreboot-gerrit
mailing list