[coreboot-gerrit] New patch to review for coreboot: 7aeb5f5 nvidia/tegra132: we write tables in ramstage

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10128

-gerrit

commit 7aeb5f574668c0a4be746ba0aa2e766acad7a804
Author: Patrick Georgi <pgeorgi at chromium.org>
Date:   Thu May 7 12:29:13 2015 +0200

    nvidia/tegra132: we write tables in ramstage
    
    So that's more precise than "anything non-pre-ram".
    
    Change-Id: I21db536a5ea704c4b087f57d0b761dd3fdf43e3e
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
---
 src/soc/nvidia/tegra132/uart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/soc/nvidia/tegra132/uart.c b/src/soc/nvidia/tegra132/uart.c
index 386eaf9..2055c46 100644
--- a/src/soc/nvidia/tegra132/uart.c
+++ b/src/soc/nvidia/tegra132/uart.c
@@ -146,7 +146,7 @@ void uart_tx_flush(int idx)
 	tegra132_uart_tx_flush(uart_ptr);
 }
 
-#ifndef __PRE_RAM__
+#if ENV_RAMSTAGE
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;