[coreboot-gerrit] Patch set updated for coreboot: e2ab946 southbridge/i82801gx: Add x_EN defines for LPC_EN

[Damien Zammit (damien@zamaudio.com)]

Damien Zammit (damien at zamaudio.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10065

-gerrit

commit e2ab9467f7004f1bd0d234da0ebb6a1f3b028881
Author: Damien Zammit <damien at zamaudio.com>
Date:   Sun May 3 18:43:04 2015 +1000

    southbridge/i82801gx: Add x_EN defines for LPC_EN
    
    A few hardcoded values could be fixed after this commit on different boards.
    
    Change-Id: I3ae67f4f6136361d67d4fdae2a5a29b7b1a75478
    Signed-off-by: Damien Zammit <damien at zamaudio.com>
---
 src/southbridge/intel/i82801gx/i82801gx.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 815768b..512137b 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -108,6 +108,16 @@ int southbridge_detect_s3_resume(void);
 
 #define LPC_IO_DEC		0x80 /* IO Decode Ranges Register */
 #define LPC_EN			0x82 /* LPC IF Enables Register */
+#define   CNF2_LPC_EN		(1 << 13) /* 0x4e/0x4f */
+#define   CNF1_LPC_EN		(1 << 12) /* 0x2e/0x2f */
+#define   MC_LPC_EN		(1 << 11) /* 0x62/0x66 */
+#define   KBC_LPC_EN		(1 << 10) /* 0x60/0x64 */
+#define   GAMEH_LPC_EN		(1 << 9)  /* 0x208/0x20f */
+#define   GAMEL_LPC_EN		(1 << 8)  /* 0x200/0x207 */
+#define   FDD_LPC_EN		(1 << 3)  /* LPC_IO_DEC[12] */
+#define   LPT_LPC_EN		(1 << 2)  /* LPC_IO_DEC[9:8] */
+#define   COMB_LPC_EN		(1 << 1)  /* LPC_IO_DEC[6:4] */
+#define   COMA_LPC_EN		(1 << 0)  /* LPC_IO_DEC[2:0] */
 
 /* PCI Configuration Space (D31:F1): IDE */
 #define INTR_LN			0x3c