[coreboot-gerrit] New patch to review for coreboot: 2cf22fe DO NOT MERGE: FSP 1.1 disable BOOT_STATE_INIT_ENTRIES

Leroy P Leahy (leroy.p.leahy@intel.com) gerrit at coreboot.org
Fri May 1 22:35:59 CEST 2015


Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10056

-gerrit

commit 2cf22feafdb174ad68aaaffe7faa0b7cd0a2ea04
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Fri May 1 13:24:48 2015 -0700

    DO NOT MERGE: FSP 1.1 disable BOOT_STATE_INIT_ENTRIES
    
    Comment out BOOT_STATE_INIT_ENTRIES macros and corresponding routines to
    allow the FSP 1.1 driver to compile
    
    BRANCH=none
    BUG=None
    TEST=Build and run on Braswell
    
    Change-Id: I3f93d0d69001d2d65c62ba672b9749477d9fcc88
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
 src/drivers/intel/fsp1_1/fsp_hob.c  | 4 +++-
 src/drivers/intel/fsp1_1/fsp_util.c | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/drivers/intel/fsp1_1/fsp_hob.c b/src/drivers/intel/fsp1_1/fsp_hob.c
index 6de67f2..afe18d7 100644
--- a/src/drivers/intel/fsp1_1/fsp_hob.c
+++ b/src/drivers/intel/fsp1_1/fsp_hob.c
@@ -486,6 +486,8 @@ void __attribute__ ((weak)) update_mrc_cache(void *unused)
 }
 #endif /* CONFIG_ENABLE_MRC_CACHE */
 
+// TODO: Fix the error below, error processing macro with NULL
+#if 0 // LPL
 static void find_fsp_hob_update_mrc(void *unused)
 {
 	void *hob_list_ptr;
@@ -509,4 +511,4 @@ BOOT_STATE_INIT_ENTRIES(fsp_hob_find) = {
 	BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
 				find_fsp_hob_update_mrc, NULL),
 };
-
+#endif // 0 LPL
diff --git a/src/drivers/intel/fsp1_1/fsp_util.c b/src/drivers/intel/fsp1_1/fsp_util.c
index 9fa4ac4..8d26c09 100644
--- a/src/drivers/intel/fsp1_1/fsp_util.c
+++ b/src/drivers/intel/fsp1_1/fsp_util.c
@@ -174,6 +174,7 @@ void fsp_notify(u32 phase)
 			phase, status);
 }
 
+#if 0  /* LPL - BOOT_STATE_INIT_ENTRIES failing */
 static void fsp_notify_boot_state_callback(void *arg)
 {
 	u32 phase = (u32)arg;
@@ -193,6 +194,7 @@ BOOT_STATE_INIT_ENTRIES(fsp_bscbs) = {
 		fsp_notify_boot_state_callback,
 		(void *)EnumInitPhaseReadyToBoot)
 };
+#endif /* 0 */
 
 #endif	/* #ifndef __PRE_RAM__ */
 



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