[coreboot-gerrit] New patch to review for coreboot: b69d8d2 storm: supply vboot GPIO settings in coreboot table

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Fri Mar 27 19:05:05 CET 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9117

-gerrit

commit b69d8d27e225c0a1b51844971396b93964854de2
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Fri Aug 1 17:36:45 2014 -0700

    storm: supply vboot GPIO settings in coreboot table
    
    Storm provides three real and two fake gpios. To keep things simple,
    define them all as active low and provide appropriate values for the
    fake ones.
    
    BUG=chrome-os-partner:30705
    TEST=with the appropriate depthcharge change booted proto0, observed
         appropriate behavior following the dev switch setting
    
    Change-Id: I248b90ee06d226a223b6fc0993f209acdd58c77d
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: d48d1dcc88df0c1bd4c50f14dd2e7cd1dd4fba5d
    Original-Change-Id: Icb7fb55949fa97ead9d19f0da76392ee63bbb5b8
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/210922
---
 src/mainboard/google/storm/mainboard.c | 52 ++++++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/src/mainboard/google/storm/mainboard.c b/src/mainboard/google/storm/mainboard.c
index 94f3a92..442e9e9 100644
--- a/src/mainboard/google/storm/mainboard.c
+++ b/src/mainboard/google/storm/mainboard.c
@@ -19,7 +19,11 @@
 
 #include <arch/cache.h>
 #include <boot/coreboot_tables.h>
+#include <console/console.h>
 #include <device/device.h>
+#include <delay.h>
+#include <string.h>
+
 #include <soc/qualcomm/ipq806x/include/clock.h>
 #include <soc/qualcomm/ipq806x/include/gpio.h>
 #include <soc/qualcomm/ipq806x/include/usb.h>
@@ -93,3 +97,51 @@ void lb_board(struct lb_header *header)
 	dma->range_start = CONFIG_DRAM_DMA_START;
 	dma->range_size = CONFIG_DRAM_DMA_SIZE;
 }
+
+#define FAKE_GPIO_NUM		-1
+
+struct gpio_desc {
+	gpio_t gpio_num;
+	const char *gpio_name;
+	uint32_t fake_value;
+};
+
+static const struct gpio_desc descriptors[] = {
+	{ 15, "developer" },
+	{ 16, "recovery" },
+	{ 17, "write protect" },
+	{ FAKE_GPIO_NUM, "power", 1 },	/* Power never pressed. */
+	{ FAKE_GPIO_NUM, "lid", 0 }	/* Lid always open. */
+};
+
+static void fill_lb_gpio(struct lb_gpio *pgpio, const struct gpio_desc *pdesc)
+{
+	gpio_t gpio_num = pdesc->gpio_num;
+
+	pgpio->port = gpio_num;
+	if (gpio_num == FAKE_GPIO_NUM) {
+		pgpio->value = pdesc->fake_value;
+	} else {
+		gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE,
+				     GPIO_NO_PULL, GPIO_2MA, GPIO_DISABLE);
+		udelay(10); /* Should be enough to settle. */
+		pgpio->value = gpio_get_in_value(gpio_num);
+	}
+	pgpio->polarity = ACTIVE_LOW;
+	strncpy((char *)pgpio->name, pdesc->gpio_name, sizeof(pgpio->name));
+
+	printk(BIOS_INFO, "%s: %s: port %d value %d\n",
+	       __func__, pgpio->name, pgpio->port, pgpio->value);
+}
+
+void fill_lb_gpios(struct lb_gpios *gpios)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(descriptors); i++)
+		fill_lb_gpio(gpios->gpios + i, descriptors + i);
+
+
+	gpios->size = sizeof(*gpios) + sizeof(struct lb_gpio) * i;
+	gpios->count = i;
+}



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