[coreboot-gerrit] Patch set updated for coreboot: 183b558 arm64: Replace CONFIG_* variables with {read/write}_current

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Fri Mar 27 09:58:41 CET 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9065

-gerrit

commit 183b5581c9e017d0eb1b9b50f3cec77d1eaa44ac
Author: Furquan Shaikh <furquan at google.com>
Date:   Tue Sep 9 09:43:08 2014 -0700

    arm64: Replace CONFIG_* variables with {read/write}_current
    
    Instead of relying on config variables to determine the current el, use
    {read/write}_current macros for accessing registers.
    
    BUG=chrome-os-partner:30785
    BRANCH=None
    TEST=Compiles successfully and boots to kernel login prompt
    
    Change-Id: I6c27571fa65e06e28b71fee3e21d6ca93542e66b
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 96aed53b2879310f6f979d5aa78b8d1df7f04564
    Original-Change-Id: If4a5d1e9aa50ab180c8012862e2a6c37384f7f91
    Original-Signed-off-by: Furquan Shaikh <furquan at google.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/217148
    Original-Tested-by: Furquan Shaikh <furquan at chromium.org>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Commit-Queue: Furquan Shaikh <furquan at chromium.org>
---
 src/arch/arm64/armv8/Kconfig    | 12 ------------
 src/arch/arm64/stage_entry.S    | 16 ++++------------
 src/soc/nvidia/tegra132/Kconfig |  1 -
 3 files changed, 4 insertions(+), 25 deletions(-)

diff --git a/src/arch/arm64/armv8/Kconfig b/src/arch/arm64/armv8/Kconfig
index 88cd8cd..02a8dba 100644
--- a/src/arch/arm64/armv8/Kconfig
+++ b/src/arch/arm64/armv8/Kconfig
@@ -13,15 +13,3 @@ config ARCH_ROMSTAGE_ARMV8_64
 config ARCH_RAMSTAGE_ARMV8_64
 	def_bool n
 	select ARCH_RAMSTAGE_ARM64
-
-config ARM64_CPUS_START_IN_EL3
-	def_bool n
-	depends on ARCH_BOOTBLOCK_ARM_V8_64 || ARCH_ROMSTAGE_ARM_V8_64 || ARCH_RAMSTAGE_ARM_V8_64
-
-config ARM64_CPUS_START_IN_EL2
-	def_bool n
-	depends on ARCH_BOOTBLOCK_ARM_V8_64 || ARCH_ROMSTAGE_ARM_V8_64 || ARCH_RAMSTAGE_ARM_V8_64
-
-config ARM64_CPUS_START_IN_EL1
-	def_bool n
-	depends on ARCH_BOOTBLOCK_ARM_V8_64 || ARCH_ROMSTAGE_ARM_V8_64 || ARCH_RAMSTAGE_ARM_V8_64
diff --git a/src/arch/arm64/stage_entry.S b/src/arch/arm64/stage_entry.S
index e323de5..301711e 100644
--- a/src/arch/arm64/stage_entry.S
+++ b/src/arch/arm64/stage_entry.S
@@ -19,16 +19,8 @@
 
 
 #include <arch/asm.h>
-
-#if CONFIG_ARM64_CPUS_START_IN_EL3
-#define SCTLR_ELx sctlr_el3
-#elif CONFIG_ARM64_CPUS_START_IN_EL2
-#define SCTLR_ELx sctlr_el2
-#elif CONFIG_ARM64_CPUS_START_IN_EL1
-#define SCTLR_ELx sctlr_el1
-#else
-#error Need to know what ELx processor starts up in.
-#endif
+#define __ASSEMBLY__
+#include <arch/lib_helpers.h>
 
 #define STACK_SZ CONFIG_STACK_SIZE
 #define EXCEPTION_STACK_SZ CONFIG_STACK_SIZE
@@ -109,12 +101,12 @@ ENTRY(arm64_c_environment)
 ENDPROC(arm64_c_environment)
 
 CPU_RESET_ENTRY(arm64_cpu_startup)
-	mrs	x0, SCTLR_ELx
+        read_current x0, sctlr
 	bic	x0, x0, #(1 << 25)	/* Little Endian */
 	bic	x0, x0, #(1 << 19)	/* XN not enforced */
 	bic	x0, x0, #(1 << 12)	/* Disable Instruction Cache */
 	bic	x0, x0, #0xf		/* Clear SA, C, A, and M */
-	msr	SCTLR_ELx, x0
+	write_current sctlr, x0, x1
 	isb
 	b	arm64_c_environment
 ENDPROC(arm64_cpu_startup)
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index d7e2786..dd4017c 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -5,7 +5,6 @@ config SOC_NVIDIA_TEGRA132
 	select ARCH_VERSTAGE_ARMV4
 	select ARCH_ROMSTAGE_ARMV4
 	select ARCH_RAMSTAGE_ARMV8_64
-	select ARM64_CPUS_START_IN_EL3
 	select BOOTBLOCK_CONSOLE
 	select HAVE_MONOTONIC_TIMER
 	select HAVE_HARD_RESET



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