[coreboot-gerrit] New patch to review for coreboot: 83cff0d arm64: remove soc_secondary_cpu_init()

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9044

-gerrit

commit 83cff0d1e1fc056324fb57351069e689a6b06183
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Sat Sep 6 02:40:54 2014 -0500

    arm64: remove soc_secondary_cpu_init()
    
    The original purpose of soc_secondary_cpu_init() was to provide
    a way for the SoC to run code on the secondary processors as
    they come up. Now that devicetree based bringup is supported
    there's no need to have this functionality.
    
    BUG=chrome-os-partner:31761
    BRANCH=None
    TEST=Booted SMP into linux.
    
    Change-Id: I6fa39b66a8b728d9982b0721480b7fae45af7c6e
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 1356ec527e2bc61043ccd7dea4a7ff5182b16f3e
    Original-Change-Id: Ie5c38ef33efadb2d6fdb2f892b4d08f33eee5c42
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/216927
    Original-Reviewed-by: Furquan Shaikh <furquan at chromium.org>
---
 src/arch/arm64/c_entry.c                | 14 --------------
 src/arch/arm64/cpu-internal.h           |  7 +++++++
 src/arch/arm64/include/armv8/arch/cpu.h | 13 -------------
 3 files changed, 7 insertions(+), 27 deletions(-)

diff --git a/src/arch/arm64/c_entry.c b/src/arch/arm64/c_entry.c
index aba9fd3..4e5c151 100644
--- a/src/arch/arm64/c_entry.c
+++ b/src/arch/arm64/c_entry.c
@@ -36,11 +36,6 @@ void __attribute__((weak)) arm64_soc_init(void)
 	/* Default weak implementation does nothing. */
 }
 
-void __attribute__((weak)) soc_secondary_cpu_init(void)
-{
-	/* Default weak implementation does nothing. */
-}
-
 static void seed_stack(void)
 {
 	char *stack_begin;
@@ -71,15 +66,6 @@ static void secondary_cpu_start(void)
 	mmu_enable();
 	exception_hwinit();
 
-	if (!IS_ENABLED(CONFIG_SMP)) {
-		soc_secondary_cpu_init();
-		/*
-		 * TODO(adurbin): need a proper place to park the CPUs.
-		 * Currently assuming SoC code does the appropriate thing.
-		 */
-		while (1);
-	}
-
 	/* This will never return. */
 	arch_secondary_cpu_init();
 }
diff --git a/src/arch/arm64/cpu-internal.h b/src/arch/arm64/cpu-internal.h
index be13ba4..266dc63 100644
--- a/src/arch/arm64/cpu-internal.h
+++ b/src/arch/arm64/cpu-internal.h
@@ -21,6 +21,13 @@
 #define ARCH_CPU_INTERNAL_H
 
 /*
+ * Do the necessary work to prepare for secondary CPUs coming up. The
+ * SoC will call this function before bringing up the other CPUs. The
+ * entry point for the seoncdary CPUs is returned.
+ */
+void *prepare_secondary_cpu_startup(void);
+
+/*
  * Code path for the non-BSP CPUs. This is an internal function used.
  */
 void arch_secondary_cpu_init(void);
diff --git a/src/arch/arm64/include/armv8/arch/cpu.h b/src/arch/arm64/include/armv8/arch/cpu.h
index 8a8e3b6..a5d20c4 100644
--- a/src/arch/arm64/include/armv8/arch/cpu.h
+++ b/src/arch/arm64/include/armv8/arch/cpu.h
@@ -97,19 +97,6 @@ int arch_run_on_all_cpus(struct cpu_action *action);
 int arch_run_on_cpu_async(unsigned int cpu, struct cpu_action *action);
 int arch_run_on_all_cpus_async(struct cpu_action *action);
 
-/*
- * Do the necessary work to prepare for secondary CPUs coming up. The
- * SoC will call this function before bringing up the other CPUs. The
- * entry point for the seoncdary CPUs is returned.
- */
-void *prepare_secondary_cpu_startup(void);
-
-/*
- * Function provided by the SoC code that is called for each secondary
- * CPU startup.
- */
-void soc_secondary_cpu_init(void);
-
 #endif /* !__PRE_RAM__ */
 
 /*