[coreboot-gerrit] New patch to review for coreboot: 49c1cda arm64: provide API for coordinating secondary CPU bringup

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9019

-gerrit

commit 49c1cda40ee7563a9f325ea0af4098a033a0f41e
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Aug 27 17:25:18 2014 -0500

    arm64: provide API for coordinating secondary CPU bringup
    
    Provides a minimal API for coordinating with the SoC for
    bringing up the secondary CPUs. There's no eventloop or
    dispatcher currently nor does it do anything proper when
    one of the secondary CPUs are brought up. Those decisions
    are deferred to the SoC.
    
    BUG=chrome-os-partner:31545
    BRANCH=None
    TEST=Built and brought up 2nd cpu using this API.
    
    Change-Id: I8ac0418282e2e5b4ab3abfd21c88f51d704e10f9
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 5303ae3d6bfc9f8f908fcb890e184eb9b57f1376
    Original-Change-Id: I3b7334b7d2df2df093cdc0cbb997e8230d3b2685
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/214775
    Original-Reviewed-by: Furquan Shaikh <furquan at chromium.org>
---
 src/arch/arm64/c_entry.c                | 32 ++++++++++++++++++++++++++++++--
 src/arch/arm64/include/armv8/arch/cpu.h | 13 +++++++++++++
 2 files changed, 43 insertions(+), 2 deletions(-)

diff --git a/src/arch/arm64/c_entry.c b/src/arch/arm64/c_entry.c
index 3e9d44e..8695187 100644
--- a/src/arch/arm64/c_entry.c
+++ b/src/arch/arm64/c_entry.c
@@ -17,9 +17,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <arch/stages.h>
+#include <arch/cache.h>
 #include <arch/cpu.h>
-
+#include <arch/exception.h>
+#include <arch/mmu.h>
+#include <arch/stages.h>
 
 /*
  * This variable holds entry point for CPUs starting up. Before the other
@@ -33,6 +35,11 @@ void __attribute__((weak)) arm64_soc_init(void)
 	/* Default weak implementation does nothing. */
 }
 
+void __attribute__((weak)) soc_secondary_cpu_init(void)
+{
+	/* Default weak implementation does nothing. */
+}
+
 static void seed_stack(void)
 {
 	char *stack_begin;
@@ -57,3 +64,24 @@ void arm64_init(void)
 	arm64_soc_init();
 	main();
 }
+
+static void secondary_cpu_start(void)
+{
+	mmu_enable();
+	exception_hwinit();
+	soc_secondary_cpu_init();
+	/*
+	 * TODO(adurbin): need a proper place to park the CPUs. Currently
+	 * assuming SoC code does the appropriate thing.
+	 */
+	while (1);
+}
+
+extern void arm64_cpu_startup(void);
+void *prepare_secondary_cpu_startup(void)
+{
+	c_entry = &secondary_cpu_start;
+	dcache_clean_invalidate_by_mva(c_entry, sizeof(c_entry));
+
+	return &arm64_cpu_startup;
+}
diff --git a/src/arch/arm64/include/armv8/arch/cpu.h b/src/arch/arm64/include/armv8/arch/cpu.h
index e80e739..5ce9ba3 100644
--- a/src/arch/arm64/include/armv8/arch/cpu.h
+++ b/src/arch/arm64/include/armv8/arch/cpu.h
@@ -58,4 +58,17 @@ void *cpu_get_stack(unsigned int cpu);
 /* Return the top of the exception stack for the specified cpu. */
 void *cpu_get_exception_stack(unsigned int cpu);
 
+/*
+ * Do the necessary work to prepare for secondary CPUs coming up. The
+ * SoC will call this function before bringing up the other CPUs. The
+ * entry point for the seoncdary CPUs is returned.
+ */
+void *prepare_secondary_cpu_startup(void);
+
+/*
+ * Function provided by the SoC code that is called for each secondary
+ * CPU startup.
+ */
+void soc_secondary_cpu_init(void);
+
 #endif /* __ARCH_CPU_H__ */