[coreboot-gerrit] Patch merged into coreboot/master: dabf0eb ryu: Add three more full LPDDR3 SDRAM BCTs

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit dabf0ebec03772cac320dc950cac57a48e1bd3c9
Author: Jimmy Zhang <jimmzhang at nvidia.com>
Date:   Fri Aug 1 16:36:35 2014 -0700

    ryu: Add three more full LPDDR3 SDRAM BCTs
    
    Add in the following BCTs to source code tree:
    Hynix 4GB 924MHz BCT
    Micron 4GB 924MHz BCT
    Samsung 4GB 924MHz BCT
    
    BUG=none
    BRANCH=none
    TEST=Built and tested Micron 924 bct on A44 board with Elpida memory chip.
    
    Change-Id: I59a5cc1133bf41a51f40a771ff0a7b7ef8d549fe
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 0a72f1b704928fad341bda460ecc349914ec612c
    Original-Change-Id: I9e5b54c3eb7ee4c4010b5aaf5dad030eba75108b
    Original-Signed-off-by: Jimmy Zhang <jimmzhang at nvidia.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/210872
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-by: Tom Warren <twarren at nvidia.com>
    Reviewed-on: http://review.coreboot.org/8904
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/8904 for details.

-gerrit