[coreboot-gerrit] Patch set updated for coreboot: e767cfa ryu: Initialize CNTFRQ in t132

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8941

-gerrit

commit e767cfa52f44cf89a4c6cba922b502cebdf9d9ca
Author: Furquan Shaikh <furquan at google.com>
Date:   Fri Aug 15 15:26:01 2014 -0700

    ryu: Initialize CNTFRQ in t132
    
    BUG=chrome-os-partner:31356
    BRANCH=None
    TEST=Kernel boots with the changes required in depthcharge
    
    Change-Id: I061305e0ab8f6145c0dc74b2ff958a667ff7276a
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 0ff2fc86c1c6e6b592fa3faffd360a3a8c6351a9
    Original-Change-Id: If1c5850607174ab0f485ef41d47016056d9832cd
    Original-Signed-off-by: Furquan Shaikh <furquan at google.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/212730
    Original-Tested-by: Furquan Shaikh <furquan at chromium.org>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Commit-Queue: Furquan Shaikh <furquan at chromium.org>
---
 src/soc/nvidia/tegra132/soc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/soc/nvidia/tegra132/soc.c b/src/soc/nvidia/tegra132/soc.c
index 84b0507..519ba37 100644
--- a/src/soc/nvidia/tegra132/soc.c
+++ b/src/soc/nvidia/tegra132/soc.c
@@ -23,6 +23,7 @@
 #include <arch/io.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <soc/addressmap.h>
+#include <soc/clock.h>
 #include <soc/nvidia/tegra/apbmisc.h>
 
 static void soc_read_resources(device_t dev)
@@ -61,6 +62,7 @@ static void soc_read_resources(device_t dev)
 static void soc_init(device_t dev)
 {
 	printk(BIOS_INFO, "CPU: Tegra132\n");
+	clock_init_arm_generic_timer();
 }
 
 static void soc_noop(device_t dev)