[coreboot-gerrit] New patch to review for coreboot: ee6446c broadwell: Fix GPE register addresses

[Marc Jones (marc.jones@se-eng.com)]

Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8965

-gerrit

commit ee6446cc0be7a6455b6499cdc54a277b3418f0af
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Tue Aug 26 13:47:18 2014 -0700

    broadwell: Fix GPE register addresses
    
    This macro is incorrect and should be counting by dword instead of byte.
    The effects of this were subtle: incorrect events in ELOG and hanging when
    waking from USB input because PME_B0 was not disabled properly.
    
    BUG=chrome-os-partner:31611
    BRANCH=none
    TEST=test wake from suspend with USB keyboard
    
    Original-Change-Id: I7caf1d46283071787550a9765703897181774957
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/214258
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    (cherry picked from commit 3cfc4a1812466cb1c1317b8f21321aafee623857)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I3e2f8190d824692ecb961615becf65319a6ffd8b
---
 src/soc/intel/broadwell/broadwell/pm.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/soc/intel/broadwell/broadwell/pm.h b/src/soc/intel/broadwell/broadwell/pm.h
index 91f55fe..886e100 100644
--- a/src/soc/intel/broadwell/broadwell/pm.h
+++ b/src/soc/intel/broadwell/broadwell/pm.h
@@ -83,11 +83,11 @@
 #define TCO2_STS		0x66
 #define  TCO2_STS_SECOND_TO	(1 << 1)
 
-#define GPE0_STS(x)		(0x80 + x)
+#define GPE0_STS(x)		(0x80 + (x * 4))
 #define  GPE_31_0		0	/* 0x80/0x90 = GPE[31:0] */
-#define  GPE_63_32		1	/* 0x80/0x90 = GPE[63:32] */
-#define  GPE_94_64		2	/* 0x80/0x90 = GPE[94:64] */
-#define  GPE_STD		3	/* 0x80/0x90 = Standard GPE */
+#define  GPE_63_32		1	/* 0x84/0x94 = GPE[63:32] */
+#define  GPE_94_64		2	/* 0x88/0x98 = GPE[94:64] */
+#define  GPE_STD		3	/* 0x8c/0x9c = Standard GPE */
 #define   WADT_STS		(1 << 18)
 #define   GP27_STS		(1 << 16)
 #define   PME_B0_STS		(1 << 13)
@@ -99,7 +99,7 @@
 #define   TCOSCI_STS		(1 << 6)
 #define   SWGPE_STS		(1 << 2)
 #define   HOT_PLUG_STS		(1 << 1)
-#define GPE0_EN(x)		(0x90 + x)
+#define GPE0_EN(x)		(0x90 + (x * 4))
 #define   WADT_en		(1 << 18)
 #define   GP27_EN		(1 << 16)
 #define   PME_B0_EN		(1 << 13)