[coreboot-gerrit] Patch set updated for coreboot: 2f405b7 tegra132: implement platform_prog_run()

[Aaron Durbin (adurbin@google.com)]

Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8848

-gerrit

commit 2f405b735fffc513536f3c759c2b2db59f263911
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Fri Mar 20 16:47:21 2015 -0500

    tegra132: implement platform_prog_run()
    
    The tegra132 SoC is currently booting up on the AVP cpu which
    bootstraps the rest of the SoC. Upon exiting romstage it
    runs ramstage from its faster armv8 core. Instead of hard
    coding the stage loading operations use run_ramstage().
    
    Change-Id: Ib9b3eecf376ae022f910295920a085bde6e17f9f
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/nvidia/tegra132/romstage.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/soc/nvidia/tegra132/romstage.c b/src/soc/nvidia/tegra132/romstage.c
index 69271f0..e577400 100644
--- a/src/soc/nvidia/tegra132/romstage.c
+++ b/src/soc/nvidia/tegra132/romstage.c
@@ -23,6 +23,7 @@
 #include <console/cbmem_console.h>
 #include <console/console.h>
 #include <arch/exception.h>
+#include <program_loading.h>
 
 #include <soc/addressmap.h>
 #include <soc/sdram_configs.h>
@@ -35,8 +36,6 @@
 void romstage(void);
 void romstage(void)
 {
-	void *entry;
-
 	console_init();
 	exception_init();
 
@@ -69,12 +68,14 @@ void romstage(void)
 
 	mainboard_init_tpm_i2c();
 
-	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA,
-				CONFIG_CBFS_PREFIX "/ramstage");
-
 	cbmemc_reinit();
 
-	ccplex_cpu_start(entry);
+	run_ramstage();
+}
+
+void platform_prog_run(struct prog *prog)
+{
+	ccplex_cpu_start(prog_entry(prog));
 
 	clock_halt_avp();
 }