[coreboot-gerrit] Patch set updated for coreboot: 7d28dad tegra132: use pre-existing reset API
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Tue Mar 24 13:38:40 CET 2015
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8911
-gerrit
commit 7d28dad60d046203c7cd792b36343c1dd955f911
Author: Aaron Durbin <adurbin at chromium.org>
Date: Tue Aug 5 13:30:38 2014 -0500
tegra132: use pre-existing reset API
coreboot already has a reset API. Utilize it by selecting
HAVE_HARD_RESET. The tegra132 boards have to provide the
hard_reset() implementation as that involves board-specific
bits. The tegra132 code then provides a cpu_reset() routine
that just promotes that call to a hard_reset().
For the existing tegra132 boards remove the unnecessary files
from the build.
BUG=chrome-os-partner:30784
BRANCH=None
TEST=Ensured hard_reset() does something on Ryu.
Change-Id: I6d5aa928fec95b361175e35e0a26812829ffdfc3
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 31edd4ff7486ded87d2525cd360d48959b6aef7c
Original-Change-Id: I1e1b014062dafb5d81fb9da40006c5405073a95d
Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/211131
Original-Reviewed-by: Tom Warren <twarren at nvidia.com>
Original-Reviewed-by: Furquan Shaikh <furquan at chromium.org>
---
src/mainboard/google/rush/Makefile.inc | 3 ++-
src/mainboard/google/rush/reset.c | 9 ++++-----
src/mainboard/google/rush/reset.h | 25 -------------------------
src/mainboard/google/rush_ryu/Makefile.inc | 3 +++
src/mainboard/google/rush_ryu/reset.c | 9 ++++-----
src/mainboard/google/rush_ryu/reset.h | 25 -------------------------
src/soc/nvidia/tegra132/Kconfig | 1 +
src/soc/nvidia/tegra132/Makefile.inc | 3 +++
src/soc/nvidia/tegra132/reset.c | 29 +++++++++++++++++++++++++++++
9 files changed, 46 insertions(+), 61 deletions(-)
diff --git a/src/mainboard/google/rush/Makefile.inc b/src/mainboard/google/rush/Makefile.inc
index 59a1653..2a1ce99 100644
--- a/src/mainboard/google/rush/Makefile.inc
+++ b/src/mainboard/google/rush/Makefile.inc
@@ -31,11 +31,12 @@ bootblock-y += bootblock.c
bootblock-y += pmic.c
bootblock-y += reset.c
-romstage-y += reset.c
romstage-y += romstage.c
romstage-y += sdram_configs.c
romstage-$(CONFIG_CHROMEOS) += chromeos.c
+romstage-y += reset.c
ramstage-y += boardid.c
ramstage-y += mainboard.c
+ramstage-y += reset.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
diff --git a/src/mainboard/google/rush/reset.c b/src/mainboard/google/rush/reset.c
index 3816340..f3057ca 100644
--- a/src/mainboard/google/rush/reset.c
+++ b/src/mainboard/google/rush/reset.c
@@ -18,12 +18,11 @@
*/
#include <arch/io.h>
+#include <reset.h>
#include <soc/nvidia/tegra132/gpio.h>
-#include "reset.h"
-
-void cpu_reset(void)
+void hard_reset(void)
{
- gpio_output(GPIO(I5), 0);
- while(1);
+ gpio_output(GPIO(I5), 0);
+ while(1);
}
diff --git a/src/mainboard/google/rush/reset.h b/src/mainboard/google/rush/reset.h
deleted file mode 100644
index be723ce..0000000
--- a/src/mainboard/google/rush/reset.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__
-#define __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__
-
-void cpu_reset(void);
-
-#endif /* __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__ */
diff --git a/src/mainboard/google/rush_ryu/Makefile.inc b/src/mainboard/google/rush_ryu/Makefile.inc
index 14b9427..d1219b1 100644
--- a/src/mainboard/google/rush_ryu/Makefile.inc
+++ b/src/mainboard/google/rush_ryu/Makefile.inc
@@ -31,8 +31,11 @@ bootblock-y += bootblock.c
bootblock-y += pmic.c
bootblock-y += reset.c
+romstage-y += chromeos.c
+romstage-y += reset.c
romstage-y += reset.c
romstage-y += romstage.c
ramstage-y += boardid.c
ramstage-y += mainboard.c
+ramstage-y += reset.c
diff --git a/src/mainboard/google/rush_ryu/reset.c b/src/mainboard/google/rush_ryu/reset.c
index 3816340..f3057ca 100644
--- a/src/mainboard/google/rush_ryu/reset.c
+++ b/src/mainboard/google/rush_ryu/reset.c
@@ -18,12 +18,11 @@
*/
#include <arch/io.h>
+#include <reset.h>
#include <soc/nvidia/tegra132/gpio.h>
-#include "reset.h"
-
-void cpu_reset(void)
+void hard_reset(void)
{
- gpio_output(GPIO(I5), 0);
- while(1);
+ gpio_output(GPIO(I5), 0);
+ while(1);
}
diff --git a/src/mainboard/google/rush_ryu/reset.h b/src/mainboard/google/rush_ryu/reset.h
deleted file mode 100644
index be723ce..0000000
--- a/src/mainboard/google/rush_ryu/reset.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__
-#define __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__
-
-void cpu_reset(void);
-
-#endif /* __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__ */
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index 2bddf5c..bfd7089 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -8,6 +8,7 @@ config SOC_NVIDIA_TEGRA132
select ARM_LPAE
select DYNAMIC_CBMEM
select BOOTBLOCK_CONSOLE
+ select HAVE_HARD_RESET
select HAVE_UART_SPECIAL
select HAVE_UART_MEMORY_MAPPED
select EARLY_CONSOLE
diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc
index 868da42..617376d 100644
--- a/src/soc/nvidia/tegra132/Makefile.inc
+++ b/src/soc/nvidia/tegra132/Makefile.inc
@@ -8,6 +8,7 @@ bootblock-y += i2c.c
bootblock-y += dma.c
bootblock-y += monotonic_timer.c
bootblock-y += padconfig.c
+bootblock-y += reset.c
bootblock-y += ../tegra/gpio.c
bootblock-y += ../tegra/i2c.c
bootblock-y += ../tegra/pingroup.c
@@ -24,6 +25,7 @@ romstage-y += cbmem.c
romstage-y += timer.c
romstage-y += ccplex.c
romstage-y += clock.c
+romstage-y += reset.c
romstage-y += spi.c
romstage-y += i2c.c
romstage-y += dma.c
@@ -49,6 +51,7 @@ ramstage-y += i2c.c
ramstage-y += dma.c
ramstage-y += monotonic_timer.c
ramstage-y += padconfig.c
+ramstage-y += reset.c
ramstage-y += ../tegra/apbmisc.c
ramstage-y += ../tegra/gpio.c
ramstage-y += ../tegra/i2c.c
diff --git a/src/soc/nvidia/tegra132/reset.c b/src/soc/nvidia/tegra132/reset.c
new file mode 100644
index 0000000..dc49c33
--- /dev/null
+++ b/src/soc/nvidia/tegra132/reset.c
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <reset.h>
+
+/*
+ * Promote cpu_reset() to a hard_reset(). A shallower reset can be added,
+ * if needed, at a later time.
+ */
+void cpu_reset(void)
+{
+ hard_reset();
+}
More information about the coreboot-gerrit
mailing list