[coreboot-gerrit] New patch to review for coreboot: 390bc8b rush: support for DMA region

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8928

-gerrit

commit 390bc8b8f863b270496cabe198332eae31ef32b0
Author: Furquan Shaikh <furquan at google.com>
Date:   Tue Aug 12 17:20:42 2014 -0700

    rush: support for DMA region
    
    Currently rush needs a DMA region in order to communicate with
    USB devices. Therefore, add that region to the memory map.
    
    BUG=chrome-os-partner:31293
    BRANCH=None
    TEST=With the changes for adding non-cacheable memory range and adding DMA
    region, booting from USB reaches same point as MMC.
    
    Change-Id: I82d97840fad8cc96bf958c6efa13d2fdc1233d79
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: b182651a1b6db1a7adbf315b6865467590a0785c
    Original-Change-Id: I6a465eaa77e0d5ab4d5fb22161e88e7a5fd9c4a8
    Original-Signed-off-by: Furquan Shaikh <furquan at google.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/212193
    Original-Tested-by: Furquan Shaikh <furquan at chromium.org>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Commit-Queue: Furquan Shaikh <furquan at chromium.org>
---
 src/mainboard/google/rush/Kconfig     |  8 ++++++++
 src/mainboard/google/rush/mainboard.c | 21 +++++++++++++++++++++
 2 files changed, 29 insertions(+)

diff --git a/src/mainboard/google/rush/Kconfig b/src/mainboard/google/rush/Kconfig
index eaae86c..f723a6c 100644
--- a/src/mainboard/google/rush/Kconfig
+++ b/src/mainboard/google/rush/Kconfig
@@ -95,4 +95,12 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS
 	hex
 	default 1
 
+config DRAM_DMA_START
+       hex
+       default 0xc0000000
+
+config DRAM_DMA_SIZE
+       hex
+       default 0x00200000
+
 endif # BOARD_GOOGLE_RUSH
diff --git a/src/mainboard/google/rush/mainboard.c b/src/mainboard/google/rush/mainboard.c
index c4b0b44..35417f0 100644
--- a/src/mainboard/google/rush/mainboard.c
+++ b/src/mainboard/google/rush/mainboard.c
@@ -17,9 +17,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <arch/mmu.h>
 #include <device/device.h>
 #include <boot/coreboot_tables.h>
 
+#include <memrange.h>
 #include <soc/clock.h>
 #include <soc/nvidia/tegra132/clk_rst.h>
 #include <soc/nvidia/tegra132/spi.h>
@@ -86,3 +88,22 @@ struct chip_operations mainboard_ops = {
         .name   = "rush",
         .enable_dev = mainboard_enable,
 };
+
+
+void mainboard_add_memory_ranges(struct memranges *map)
+{
+	/* Create non-cacheable region for DMA operations. */
+	memranges_insert(map, CONFIG_DRAM_DMA_START, CONFIG_DRAM_DMA_SIZE,
+			 MA_MEM  | MA_MEM_NC | MA_NS | MA_RW);
+}
+
+void lb_board(struct lb_header *header)
+{
+	struct lb_range *dma;
+
+	dma = (struct lb_range *)lb_new_record(header);
+	dma->tag = LB_TAB_DMA;
+	dma->size = sizeof(*dma);
+	dma->range_start = CONFIG_DRAM_DMA_START;
+	dma->range_size = CONFIG_DRAM_DMA_SIZE;
+}