[coreboot-gerrit] Patch set updated for coreboot: 938d959 veyron_pinky: Move PMIC driver into SoC directory
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Mon Mar 23 19:51:11 CET 2015
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8871
-gerrit
commit 938d959a0c2cb037c34c63aaaec9c15b4107375a
Author: Julius Werner <jwerner at chromium.org>
Date: Wed Sep 10 19:37:15 2014 -0700
veyron_pinky: Move PMIC driver into SoC directory
The Rk808 PMIC is a part that will probably be used by most Rk3288
boards, so it makes sense to keep it as common code in the the SoC
directory. This patch puts LDO control functions into rk3288/rk808.c, so
that the mainboard only has to call a simple interface to set up the
specific LDOs it requires.
BUG=chrome-os-partner:30167
TEST=Booted both this and the old version with a stubbed-out
i2c_writeb(), ensured that the final values are the same.
Change-Id: I7efa60f8a357ce6be7490e64d2e0e3f72ad16f1c
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 4df22cd78ee04fefc6f7fa0e5c3d903eb1794422
Original-Change-Id: Ic172f9c402e829995f049726d3cb6dbd637039d1
Original-Signed-off-by: Julius Werner <jwerner at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/217598
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
src/mainboard/google/veyron_pinky/Makefile.inc | 1 -
src/mainboard/google/veyron_pinky/mainboard.c | 10 ++-
src/mainboard/google/veyron_pinky/pmic.c | 85 --------------------------
src/mainboard/google/veyron_pinky/pmic.h | 23 -------
src/soc/rockchip/rk3288/Makefile.inc | 1 +
src/soc/rockchip/rk3288/rk808.c | 66 ++++++++++++++++++++
src/soc/rockchip/rk3288/rk808.h | 25 ++++++++
7 files changed, 101 insertions(+), 110 deletions(-)
diff --git a/src/mainboard/google/veyron_pinky/Makefile.inc b/src/mainboard/google/veyron_pinky/Makefile.inc
index 3ae8763..7b49a55 100644
--- a/src/mainboard/google/veyron_pinky/Makefile.inc
+++ b/src/mainboard/google/veyron_pinky/Makefile.inc
@@ -24,5 +24,4 @@ romstage-y += sdram_configs.c
ramstage-y += boardid.c
ramstage-y += chromeos.c
ramstage-y += mainboard.c
-ramstage-y += pmic.c
diff --git a/src/mainboard/google/veyron_pinky/mainboard.c b/src/mainboard/google/veyron_pinky/mainboard.c
index 349240f..d3537bf 100644
--- a/src/mainboard/google/veyron_pinky/mainboard.c
+++ b/src/mainboard/google/veyron_pinky/mainboard.c
@@ -29,8 +29,8 @@
#include <soc/rockchip/rk3288/soc.h>
#include <soc/rockchip/rk3288/pmu.h>
#include <soc/rockchip/rk3288/clock.h>
+#include <soc/rockchip/rk3288/rk808.h>
#include <soc/rockchip/rk3288/spi.h>
-#include "pmic.h"
#define DRAM_START (CONFIG_SYS_SDRAM_BASE >> 20)
#define DRAM_SIZE CONFIG_DRAM_SIZE_MB
@@ -110,6 +110,14 @@ static void configure_i2s(void)
rkclk_configure_i2s(12288000);
}
+static void pmic_init(unsigned int bus)
+{
+ rk808_configure_ldo(bus, 4, 1800); /* VCC18_LCD */
+ rk808_configure_ldo(bus, 5, 1800); /* VCC18_CODEC */
+ rk808_configure_ldo(bus, 6, 1000); /* VCC10_LCD */
+ rk808_configure_ldo(bus, 8, 3300); /* VCCIO_SD */
+}
+
static void mainboard_init(device_t dev)
{
setup_iomux();
diff --git a/src/mainboard/google/veyron_pinky/pmic.c b/src/mainboard/google/veyron_pinky/pmic.c
deleted file mode 100644
index 2e6f0ab..0000000
--- a/src/mainboard/google/veyron_pinky/pmic.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Rockchip Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <console/console.h>
-#include <device/i2c.h>
-#include <stdint.h>
-#include <stdlib.h>
-#include "pmic.h"
-
-#define RK808_ADDR 0x1b
-#define LOD1EN (1 << 0)
-#define LOD2EN (1 << 1)
-#define LOD3EN (1 << 2)
-#define LOD4EN (1 << 3)
-#define LOD5EN (1 << 4)
-#define LOD6EN (1 << 5)
-#define LOD7EN (1 << 6)
-#define LOD8EN (1 << 7)
-
-#define LDO_BASE18V 18
-#define LDO_BASE08V 8
-#define LDOVSEL(mV, base) (mV/100 - base)
-
-struct rk808_reg {
- u8 reg;
- u8 val;
-};
-
-enum {
- LDO_EN = 0x24,
- LDO1_ONSEL = 0x3B,
- LDO1_SLPSEL,
- LDO2_ONSEL,
- LDO2_SLPSEL,
- LDO3_ONSEL,
- LDO3_SLPSEL,
- LDO4_ONSEL,
- LDO4_SLPSEL,
- LDO5_ONSEL,
- LDO5_SLPSEL,
- LDO6_ONSEL,
- LDO6_SLPSEL,
- LDO7_ONSEL,
- LDO7_SLPSEL,
- LDO8_ONSEL,
- LDO8_SLPSEL,
-};
-
-static struct rk808_reg ldo_initlist[] = {
- {LDO4_ONSEL, LDOVSEL(1800, LDO_BASE18V)}, /*vcc18_lcd*/
- {LDO5_ONSEL, LDOVSEL(1800, LDO_BASE18V)}, /*vcc18_codec*/
- {LDO6_ONSEL, LDOVSEL(1000, LDO_BASE08V)}, /*vcc10_lcd*/
- {LDO8_ONSEL, LDOVSEL(3300, LDO_BASE18V)}, /*vccio_sd*/
-};
-
-void pmic_init(unsigned int bus)
-{
- uint8_t read_reg;
- int i;
- for (i = 0; i < ARRAY_SIZE(ldo_initlist); i++) {
- struct rk808_reg *reg = &ldo_initlist[i];
- i2c_writeb(bus, RK808_ADDR, reg->reg, reg->val);
- }
-
- /*enable ldo4,ldo5,ldo6,ldo8*/
- i2c_readb(bus, RK808_ADDR, LDO_EN, &read_reg);
- i2c_writeb(bus, RK808_ADDR, LDO_EN, read_reg | LOD8EN | LOD6EN
- | LOD5EN | LOD4EN);
-}
diff --git a/src/mainboard/google/veyron_pinky/pmic.h b/src/mainboard/google/veyron_pinky/pmic.h
deleted file mode 100644
index dd6ed0b..0000000
--- a/src/mainboard/google/veyron_pinky/pmic.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Rockchip Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef __SOC_ROCKCHIP_RK3288_PMIC_H__
-#define __SOC_ROCKCHIP_RK3288_PMIC_H__
-void pmic_init(unsigned int bus);
-#endif
diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc
index 8453757..f9aa377 100644
--- a/src/soc/rockchip/rk3288/Makefile.inc
+++ b/src/soc/rockchip/rk3288/Makefile.inc
@@ -50,6 +50,7 @@ ramstage-y += clock.c
ramstage-y += spi.c
ramstage-y += gpio.c
ramstage-y += media.c
+ramstage-y += rk808.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c
$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
diff --git a/src/soc/rockchip/rk3288/rk808.c b/src/soc/rockchip/rk3288/rk808.c
new file mode 100644
index 0000000..0d629ca
--- /dev/null
+++ b/src/soc/rockchip/rk3288/rk808.c
@@ -0,0 +1,66 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Rockchip Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <assert.h>
+#include <console/console.h>
+#include <device/i2c.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include "rk808.h"
+
+#define RK808_ADDR 0x1b
+
+#define LDO_EN 0x24
+#define LDO_ONSEL(i) (0x39 + 2 * i)
+#define LDO_SLPSEL(i) (0x3a + 2 * i)
+
+static void rk808_clrsetbits(uint8_t bus, uint8_t reg, uint8_t clr, uint8_t set)
+{
+ uint8_t value;
+
+ if (i2c_readb(bus, RK808_ADDR, reg, &value) ||
+ i2c_writeb(bus, RK808_ADDR, reg, (value & ~clr) | set))
+ printk(BIOS_ERR, "ERROR: Cannot set Rk808[%#x]!\n", reg);
+}
+
+void rk808_configure_ldo(uint8_t bus, int ldo, int millivolts)
+{
+ uint8_t vsel;
+
+ switch (ldo) {
+ case 1:
+ case 2:
+ case 4:
+ case 5:
+ case 8:
+ vsel = millivolts / 100 - 18;
+ break;
+ case 3:
+ case 6:
+ case 7:
+ vsel = millivolts / 100 - 8;
+ break;
+ default:
+ die("Unknown LDO index!");
+ }
+ assert(vsel <= 0x10);
+
+ rk808_clrsetbits(bus, LDO_ONSEL(ldo), 0x1f, vsel);
+ rk808_clrsetbits(bus, LDO_EN, 0, 1 << (ldo - 1));
+}
diff --git a/src/soc/rockchip/rk3288/rk808.h b/src/soc/rockchip/rk3288/rk808.h
new file mode 100644
index 0000000..a6ba67c
--- /dev/null
+++ b/src/soc/rockchip/rk3288/rk808.h
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Rockchip Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __SOC_ROCKCHIP_RK3288_PMIC_H__
+#define __SOC_ROCKCHIP_RK3288_PMIC_H__
+
+void rk808_configure_ldo(uint8_t bus, int ldo, int millivolts);
+
+#endif
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