[coreboot-gerrit] New patch to review for coreboot: b046b9a tegra132: use padconfig for initializing uart pads

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Mon Mar 23 19:28:17 CET 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8876

-gerrit

commit b046b9ae613a0196f6e42b7936a415c01b587568
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Fri Aug 1 14:16:39 2014 -0500

    tegra132: use padconfig for initializing uart pads
    
    Start using the soc_configure_pads() API. This allows for
    bulk processing of pads.
    
    BUG=chrome-os-partner:31105
    BUG=chrome-os-partner:31104
    BUG=chrome-os-partner:29981
    BRANCH=None
    TEST=Built and can get console messages on rush.
    
    Change-Id: Id2c8a685a4566bda8fc260f74f5dffdd0da03056
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: bbd7c81bc0777b38bb641b9fcf89425bfd93566d
    Original-Change-Id: Iaa6a6ff4d559aedb98b078e87b0ecddefd3402d6
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/210834
    Original-Reviewed-by: Furquan Shaikh <furquan at chromium.org>
---
 src/soc/nvidia/tegra132/bootblock.c | 27 +++++++++++++++------------
 1 file changed, 15 insertions(+), 12 deletions(-)

diff --git a/src/soc/nvidia/tegra132/bootblock.c b/src/soc/nvidia/tegra132/bootblock.c
index 5a6050a..3c48498 100644
--- a/src/soc/nvidia/tegra132/bootblock.c
+++ b/src/soc/nvidia/tegra132/bootblock.c
@@ -23,11 +23,25 @@
 #include <console/console.h>
 #include <program_loading.h>
 #include <soc/clock.h>
+#include <soc/padconfig.h>
 #include <soc/nvidia/tegra/apbmisc.h>
 
 #include "pinmux.h"
 #include "power.h"
 
+static const struct pad_config uart_console_pads[] = {
+	/* Hard coded pad usage for UARTA. */
+	PAD_CFG_SFIO(KB_ROW9, 0, UA3),
+	PAD_CFG_SFIO(KB_ROW10, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UA3),
+	/*
+	 * Disable UART2 pads as they are default connected to UARTA controller.
+	 */
+	PAD_CFG_UNUSED(UART2_RXD),
+	PAD_CFG_UNUSED(UART2_TXD),
+	PAD_CFG_UNUSED(UART2_RTS_N),
+	PAD_CFG_UNUSED(UART2_CTS_N),
+};
+
 void main(void)
 {
 	// enable pinmux clamp inputs
@@ -38,18 +52,7 @@ void main(void)
 
 	clock_early_uart();
 
-	// Serial out, tristate off.
-	pinmux_set_config(PINMUX_KB_ROW9_INDEX, PINMUX_KB_ROW9_FUNC_UA3);
-	// Serial in, tristate_on.
-	pinmux_set_config(PINMUX_KB_ROW10_INDEX, PINMUX_KB_ROW10_FUNC_UA3 |
-						 PINMUX_PULL_UP |
-						 PINMUX_INPUT_ENABLE);
-	// Mux some pins away from uart A.
-	pinmux_set_config(PINMUX_UART2_CTS_N_INDEX,
-			  PINMUX_UART2_CTS_N_FUNC_UB3 |
-			  PINMUX_INPUT_ENABLE);
-	pinmux_set_config(PINMUX_UART2_RTS_N_INDEX,
-			  PINMUX_UART2_RTS_N_FUNC_UB3);
+	soc_configure_pads(uart_console_pads, ARRAY_SIZE(uart_console_pads));
 
 	if (CONFIG_BOOTBLOCK_CONSOLE) {
 		console_init();



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