[coreboot-gerrit] Patch merged into coreboot/master: 1e60839 southbridge/amd/rs780: Remove requirement for CF8/CFC config access

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 1e60839be09ee25acea3cf94f5954907c71bb0ad
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Wed Mar 18 10:55:06 2015 +0200

    southbridge/amd/rs780: Remove requirement for CF8/CFC config access
    
    The AMD RS780 early initialization code originally used the
    CF8/CFC I/O method for PCI configuration space access. After
    the default configuration access method was changed to MMIO
    (http://review.coreboot.org/#q,aad07472), booting would hang
    at "PCI: pci_scan_bus for bus 01". Fix the problem by changing
    function rs780_nb_gfx_dev_table() so that it no longer borrows
    the BAR3 address needed for PCIe MMIO config usage.
    
    Change-Id: I8816b94c848e1b50f8c880e5867a96ca2a33a8a7
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
    Reviewed-on: http://review.coreboot.org/8394
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at google.com>


See http://review.coreboot.org/8394 for details.

-gerrit