[coreboot-gerrit] Patch set updated for coreboot: 5efc735 bootblocks: use run_romstage()

Aaron Durbin (adurbin@google.com) gerrit at coreboot.org
Tue Mar 17 20:48:12 CET 2015


Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8711

-gerrit

commit 5efc735a63e3abd21c8e8020b71a044ba937270a
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Tue Mar 17 13:20:02 2015 -0500

    bootblocks: use run_romstage()
    
    Instead of sprinkling the cbfs calls around (as well as getting
    return values incorrect) use the common run_romstage() to perform
    the necessary work to load and run romstage.
    
    Change-Id: Id59f47febf5122cb3ee60f9741cfb58cb60ccab5
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/arch/arm/armv4/bootblock_simple.c          | 10 ++--------
 src/arch/arm/armv7/bootblock_simple.c          | 10 ++--------
 src/arch/arm64/armv8/bootblock_simple.c        | 12 ++----------
 src/arch/riscv/bootblock_simple.c              | 11 ++---------
 src/mainboard/emulation/qemu-riscv/bootblock.c | 14 ++------------
 src/soc/nvidia/tegra132/bootblock.c            | 17 ++---------------
 6 files changed, 12 insertions(+), 62 deletions(-)

diff --git a/src/arch/arm/armv4/bootblock_simple.c b/src/arch/arm/armv4/bootblock_simple.c
index 15b6bde..9e399a9 100644
--- a/src/arch/arm/armv4/bootblock_simple.c
+++ b/src/arch/arm/armv4/bootblock_simple.c
@@ -24,16 +24,13 @@
 #include <bootblock_common.h>
 #include <cbfs.h>
 #include <console/console.h>
-#include <halt.h>
+#include <program_loading.h>
 
 __attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ }
 __attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
 
 void main(void)
 {
-	const char *stage_name = "fallback/romstage";
-	void *entry;
-
 	bootblock_soc_init();
 	bootblock_mainboard_init();
 
@@ -42,8 +39,5 @@ void main(void)
 		exception_init();
 	}
 
-	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);
-
-	if (entry) stage_exit(entry);
-	halt();
+	run_romstage();
 }
diff --git a/src/arch/arm/armv7/bootblock_simple.c b/src/arch/arm/armv7/bootblock_simple.c
index 2fc000d..96f2445 100644
--- a/src/arch/arm/armv7/bootblock_simple.c
+++ b/src/arch/arm/armv7/bootblock_simple.c
@@ -25,7 +25,7 @@
 #include <bootblock_common.h>
 #include <cbfs.h>
 #include <console/console.h>
-#include <halt.h>
+#include <program_loading.h>
 #include <smp/node.h>
 
 __attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ }
@@ -33,9 +33,6 @@ __attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
 
 void main(void)
 {
-	const char *stage_name = "fallback/romstage";
-	void *entry;
-
 	bootblock_soc_init();
 	bootblock_mainboard_init();
 
@@ -44,8 +41,5 @@ void main(void)
 	exception_init();
 #endif
 
-	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);
-
-	if (entry) stage_exit(entry);
-	halt();
+	run_romstage();
 }
diff --git a/src/arch/arm64/armv8/bootblock_simple.c b/src/arch/arm64/armv8/bootblock_simple.c
index 7948f2f..ce64a4c 100644
--- a/src/arch/arm64/armv8/bootblock_simple.c
+++ b/src/arch/arm64/armv8/bootblock_simple.c
@@ -25,7 +25,7 @@
 #include <arch/exception.h>
 #include <cbfs.h>
 #include <console/console.h>
-#include <halt.h>
+#include <program_loading.h>
 
 static int boot_cpu(void)
 {
@@ -39,9 +39,6 @@ static int boot_cpu(void)
 
 void main(void)
 {
-	const char *stage_name = CONFIG_CBFS_PREFIX"/romstage";
-	void *entry = NULL;
-
 	/* Globally disable MMU, caches, and branch prediction (these should
 	 * be disabled by default on reset) */
 	dcache_mmu_disable();
@@ -64,10 +61,5 @@ void main(void)
 	exception_init();
 #endif
 
-	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);
-
-	printk(BIOS_SPEW, "stage_name %s, entry %p\n", stage_name, entry);
-
-	if (entry) stage_exit(entry);
-	halt();
+	run_romstage();
 }
diff --git a/src/arch/riscv/bootblock_simple.c b/src/arch/riscv/bootblock_simple.c
index d8339d1..6cde4ec 100644
--- a/src/arch/riscv/bootblock_simple.c
+++ b/src/arch/riscv/bootblock_simple.c
@@ -26,6 +26,7 @@
 #include <arch/exception.h>
 #include <cbfs.h>
 #include <console/console.h>
+#include <program_loading.h>
 
 static int boot_cpu(void)
 {
@@ -39,9 +40,6 @@ static int boot_cpu(void)
 
 void main(void)
 {
-	const char *stage_name = CONFIG_CBFS_PREFIX"/romstage";
-	void *entry = NULL;
-
 	/* Globally disable MMU, caches, and branch prediction (these should
 	 * be disabled by default on reset) */
 	dcache_mmu_disable();
@@ -64,10 +62,5 @@ void main(void)
 	exception_init();
 #endif
 
-	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);
-
-	printk(BIOS_SPEW, "stage_name %s, entry %p\n", stage_name, entry);
-
-	if (entry) stage_exit(entry);
-	hlt();
+	run_romstage();
 }
diff --git a/src/mainboard/emulation/qemu-riscv/bootblock.c b/src/mainboard/emulation/qemu-riscv/bootblock.c
index 831b193..7282a4e 100644
--- a/src/mainboard/emulation/qemu-riscv/bootblock.c
+++ b/src/mainboard/emulation/qemu-riscv/bootblock.c
@@ -18,28 +18,18 @@
  */
 
 #include <arch/exception.h>
-#include <arch/hlt.h>
 #include <bootblock_common.h>
-#include <cbfs.h>
 #include <console/console.h>
-#include <arch/stages.h>
+#include <program_loading.h>
 
 // the qemu part of all this is very, very non-hardware like.
 // so it gets its own bootblock.
 void main(void)
 {
-	void *entry;
-
 	if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) {
 		console_init();
 		exception_init();
 	}
 
-	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, CONFIG_CBFS_PREFIX"/romstage");
-	if (! entry) {
-		printk(BIOS_EMERG, "AAAAAAAAAAAAAA no romstage!\n");
-		while (1);
-	}
-
-	stage_exit(entry);
+	run_romstage();
 }
diff --git a/src/soc/nvidia/tegra132/bootblock.c b/src/soc/nvidia/tegra132/bootblock.c
index ad78f51..5a6050a 100644
--- a/src/soc/nvidia/tegra132/bootblock.c
+++ b/src/soc/nvidia/tegra132/bootblock.c
@@ -20,19 +20,16 @@
 #include <arch/exception.h>
 #include <arch/hlt.h>
 #include <bootblock_common.h>
-#include <cbfs.h>
 #include <console/console.h>
+#include <program_loading.h>
 #include <soc/clock.h>
 #include <soc/nvidia/tegra/apbmisc.h>
-#include <arch/stages.h>
 
 #include "pinmux.h"
 #include "power.h"
 
 void main(void)
 {
-	void *entry;
-
 	// enable pinmux clamp inputs
 	clamp_tristate_inputs();
 
@@ -68,15 +65,5 @@ void main(void)
 
 	printk(BIOS_INFO, "T132 bootblock: Mainboard bootblock init done\n");
 
-	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA,
-				CONFIG_CBFS_PREFIX "/romstage");
-
-	if (entry) {
-		printk(BIOS_INFO, "T132 bootblock: jumping to romstage\n");
-		stage_exit(entry);
-	} else {
-		printk(BIOS_INFO, "T132 bootblock: fallback/romstage not found\n");
-	}
-
-	hlt();
+	run_romstage();
 }



More information about the coreboot-gerrit mailing list