[coreboot-gerrit] Patch set updated for coreboot: 9b740df romstages: use common run_ramstage()
Aaron Durbin (adurbin@google.com)
gerrit at coreboot.org
Tue Mar 17 19:48:42 CET 2015
Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8710
-gerrit
commit 9b740df71bf925ae378caea79ad876ab339f65c3
Author: Aaron Durbin <adurbin at chromium.org>
Date: Tue Mar 17 13:25:19 2015 -0500
romstages: use common run_ramstage()
Instead of sprinkling the cbfs calls around (as well as getting
return values incorrect) use the common run_ramstage() to perform
the necessary work to load and run ramstage.
Change-Id: I37b1e94be36ef7a43efe65b2db110742fa105169
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/mainboard/cubietech/cubieboard/romstage.c | 7 ++-----
src/mainboard/emulation/qemu-armv7/romstage.c | 10 ++--------
src/mainboard/emulation/qemu-riscv/romstage.c | 10 ++--------
src/mainboard/google/daisy/romstage.c | 7 ++-----
src/mainboard/google/nyan/romstage.c | 9 ++-------
src/mainboard/google/nyan_big/romstage.c | 9 ++-------
src/mainboard/google/nyan_blaze/romstage.c | 9 ++-------
src/mainboard/google/peach_pit/romstage.c | 6 ++----
src/mainboard/google/storm/romstage.c | 9 ++-------
src/mainboard/google/veyron/romstage.c | 7 ++-----
src/mainboard/ti/beaglebone/romstage.c | 9 ++-------
11 files changed, 22 insertions(+), 70 deletions(-)
diff --git a/src/mainboard/cubietech/cubieboard/romstage.c b/src/mainboard/cubietech/cubieboard/romstage.c
index 6a32c56..fa660c8 100644
--- a/src/mainboard/cubietech/cubieboard/romstage.c
+++ b/src/mainboard/cubietech/cubieboard/romstage.c
@@ -16,6 +16,7 @@
#include <cpu/allwinner/a10/clock.h>
#include <cpu/allwinner/a10/gpio.h>
#include <cpu/allwinner/a10/twi.h>
+#include <program_loading.h>
#define __SIMPLE_DEVICE__
#include <device/device.h>
#include <drivers/xpowers/axp209/axp209.h>
@@ -70,7 +71,6 @@ static enum cb_err cubieboard_setup_power(void)
void main(void)
{
- void *entry;
enum cb_err err;
console_init();
@@ -87,8 +87,5 @@ void main(void)
a1x_set_cpu_clock(384);
}
- entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
- printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry);
-
- stage_exit(entry);
+ run_ramstage();
}
diff --git a/src/mainboard/emulation/qemu-armv7/romstage.c b/src/mainboard/emulation/qemu-armv7/romstage.c
index 00dfecd..b6314ccd 100644
--- a/src/mainboard/emulation/qemu-armv7/romstage.c
+++ b/src/mainboard/emulation/qemu-armv7/romstage.c
@@ -13,17 +13,11 @@
* GNU General Public License for more details.
*/
-#include <cbfs.h>
#include <console/console.h>
-#include <arch/stages.h>
+#include <program_loading.h>
void main(void)
{
- void *entry;
-
console_init();
-
- entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
-
- stage_exit(entry);
+ run_ramstage();
}
diff --git a/src/mainboard/emulation/qemu-riscv/romstage.c b/src/mainboard/emulation/qemu-riscv/romstage.c
index f4b44f6..b6314ccd 100644
--- a/src/mainboard/emulation/qemu-riscv/romstage.c
+++ b/src/mainboard/emulation/qemu-riscv/romstage.c
@@ -13,17 +13,11 @@
* GNU General Public License for more details.
*/
-#include <cbfs.h>
#include <console/console.h>
-#include <arch/stages.h>
+#include <program_loading.h>
void main(void)
{
- void *entry;
-
console_init();
-
- entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, CONFIG_CBFS_PREFIX"/ramstage");
-
- stage_exit(entry);
+ run_ramstage();
}
diff --git a/src/mainboard/google/daisy/romstage.c b/src/mainboard/google/daisy/romstage.c
index 46c6593..ebd07d7 100644
--- a/src/mainboard/google/daisy/romstage.c
+++ b/src/mainboard/google/daisy/romstage.c
@@ -37,7 +37,7 @@
#include <soc/samsung/exynos5250/trustzone.h>
#include <soc/samsung/exynos5250/wakeup.h>
#include <console/console.h>
-#include <arch/stages.h>
+#include <program_loading.h>
#include <drivers/maxim/max77686/max77686.h>
#include <device/i2c.h>
@@ -145,7 +145,6 @@ static struct mem_timings *setup_clock(void)
void main(void)
{
struct mem_timings *mem;
- void *entry;
int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);
timestamp_init(timestamp_get());
@@ -182,9 +181,7 @@ void main(void)
cbmem_initialize_empty();
- entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
-
timestamp_add_now(TS_END_ROMSTAGE);
- stage_exit(entry);
+ run_ramstage();
}
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index a71f682..914c925 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -21,11 +21,11 @@
#include <arch/cpu.h>
#include <arch/exception.h>
#include <arch/io.h>
-#include <arch/stages.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <mainboard/google/nyan/reset.h>
+#include <program_loading.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
@@ -201,12 +201,7 @@ static void __attribute__((noinline)) romstage(void)
vboot_verify_firmware(romstage_handoff_find_or_add());
- timestamp_add_now(TS_START_COPYRAM);
- void *entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA,
- "fallback/coreboot_ram");
- timestamp_add_now(TS_END_COPYRAM);
-
- stage_exit(entry);
+ run_ramstage();
}
/* Stub to force arm_init_caches to the top, before any stack/memory accesses */
diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c
index a71f682..914c925 100644
--- a/src/mainboard/google/nyan_big/romstage.c
+++ b/src/mainboard/google/nyan_big/romstage.c
@@ -21,11 +21,11 @@
#include <arch/cpu.h>
#include <arch/exception.h>
#include <arch/io.h>
-#include <arch/stages.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <mainboard/google/nyan/reset.h>
+#include <program_loading.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
@@ -201,12 +201,7 @@ static void __attribute__((noinline)) romstage(void)
vboot_verify_firmware(romstage_handoff_find_or_add());
- timestamp_add_now(TS_START_COPYRAM);
- void *entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA,
- "fallback/coreboot_ram");
- timestamp_add_now(TS_END_COPYRAM);
-
- stage_exit(entry);
+ run_ramstage();
}
/* Stub to force arm_init_caches to the top, before any stack/memory accesses */
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index 522ee91..1d7d77d 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -21,11 +21,11 @@
#include <arch/cpu.h>
#include <arch/exception.h>
#include <arch/io.h>
-#include <arch/stages.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <mainboard/google/nyan/reset.h>
+#include <program_loading.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
@@ -205,12 +205,7 @@ static void __attribute__((noinline)) romstage(void)
vboot_verify_firmware(romstage_handoff_find_or_add());
#endif
- timestamp_add_now(TS_START_COPYRAM);
- void *entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA,
- "fallback/coreboot_ram");
- timestamp_add_now(TS_END_COPYRAM);
-
- stage_exit(entry);
+ run_ramstage();
}
/* Stub to force arm_init_caches to the top, before any stack/memory accesses */
diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c
index ce4e399..04be804 100644
--- a/src/mainboard/google/peach_pit/romstage.c
+++ b/src/mainboard/google/peach_pit/romstage.c
@@ -38,7 +38,7 @@
#include <soc/samsung/exynos5420/trustzone.h>
#include <soc/samsung/exynos5420/wakeup.h>
#include <console/console.h>
-#include <arch/stages.h>
+#include <program_loading.h>
#include <drivers/maxim/max77802/max77802.h>
#include <device/i2c.h>
@@ -228,7 +228,6 @@ void main(void)
{
extern struct mem_timings mem_timings;
- void *entry;
int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);
int power_init_failed;
@@ -278,10 +277,9 @@ void main(void)
cbmem_initialize_empty();
- entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
simple_spi_test();
timestamp_add_now(TS_END_ROMSTAGE);
- stage_exit(entry);
+ run_ramstage();
}
diff --git a/src/mainboard/google/storm/romstage.c b/src/mainboard/google/storm/romstage.c
index 99cc90b..fb5b42e 100644
--- a/src/mainboard/google/storm/romstage.c
+++ b/src/mainboard/google/storm/romstage.c
@@ -17,18 +17,13 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <arch/stages.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
+#include <program_loading.h>
void main(void)
{
- void *entry;
-
console_init();
cbmem_initialize_empty();
-
- entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram");
- stage_exit(entry);
+ run_ramstage();
}
diff --git a/src/mainboard/google/veyron/romstage.c b/src/mainboard/google/veyron/romstage.c
index b9daefe..5b26f48 100644
--- a/src/mainboard/google/veyron/romstage.c
+++ b/src/mainboard/google/veyron/romstage.c
@@ -21,17 +21,15 @@
#include <armv7.h>
#include <cbfs.h>
#include <console/console.h>
-#include <arch/stages.h>
#include <cbmem.h>
#include <delay.h>
+#include <program_loading.h>
#include <timestamp.h>
#include <arch/cache.h>
#include <arch/exception.h>
void main(void)
{
- void *entry;
-
console_init();
/* used for MMU and CBMEM setup, in MB */
@@ -54,6 +52,5 @@ void main(void)
cbmem_initialize_empty();
- entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
- stage_exit(entry);
+ run_ramstage();
}
diff --git a/src/mainboard/ti/beaglebone/romstage.c b/src/mainboard/ti/beaglebone/romstage.c
index 5dce23d..9b3768a 100644
--- a/src/mainboard/ti/beaglebone/romstage.c
+++ b/src/mainboard/ti/beaglebone/romstage.c
@@ -22,18 +22,13 @@
#include <armv7.h>
#include <cbfs.h>
-#include <arch/stages.h>
+#include <program_loading.h>
#include <console/console.h>
void main(void)
{
- void *entry;
-
console_init();
printk(BIOS_INFO, "Hello from romstage.\n");
- entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
- printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry);
-
- stage_exit(entry);
+ run_ramstage();
}
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