[coreboot-gerrit] Patch merged into coreboot/master: 3aca2cd t132: load MTS microcode

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 3aca2cdced54ff525022366bc6dee949b0152d83
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Mon Jun 30 16:37:13 2014 -0500

    t132: load MTS microcode
    
    The armv8 cores need to have microcode loaded before they can
    be taken out of reset. Locate and load the MTS microcode at the
    fixed address of 0x82000000. The ccplex, once enabled, will
    decode and transfer the microcode to the carveout region.
    
    BUG=chrome-os-partner:29922
    BRANCH=None
    TEST=Built and ran. Confirmed dump of MTS region after loading code.
    
    Original-Change-Id: Ie5ab72e5363cbdb251d169356f718020d375fce6
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/206290
    Original-Reviewed-by: Furquan Shaikh <furquan at chromium.org>
    (cherry picked from commit 6726d8862c08b155b9218aa5e2e39428a105089e)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I425c2e2fd1eaec49d81bef1ff4bf4f36da9296df
    Reviewed-on: http://review.coreboot.org/8580
    Tested-by: build bot (Jenkins)
    Reviewed-by: Patrick Georgi <pgeorgi at google.com>


See http://review.coreboot.org/8580 for details.

-gerrit