[coreboot-gerrit] New patch to review for coreboot: veyron_danger: Update SDMMC power on/off code for v2

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10685

-gerrit

commit 105d11fd07fbfc9347ebdac6e49c131c8c13f394
Author: David Hendricks <dhendrix at chromium.org>
Date:   Wed Jun 3 15:27:07 2015 -0700

    veyron_danger: Update SDMMC power on/off code for v2
    
    This re-factors SDMMC power on/off to make corrections and take
    differences between board versions into account. To avoid similar-
    but-different case switch statements in romstage.c and mainboard.c,
    power on/off functions for SDMMC are split into their own .c file.
    
    BUG=none
    BRANCH=none
    TEST=built and booted of micro-SD card on Danger v2
    
    Change-Id: Ib3069c35ceff1ff98b49579a6298681c1390beee
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: eecfee4a5dd39073b5f966a25991a594b3c4b519
    Original-Change-Id: Id86ae7f40687e843ffc4e7769309d4678ad54f49
    Original-Signed-off-by: David Hendricks <dhendrix at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/280853
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
 src/mainboard/google/veyron_danger/Makefile.inc |  2 ++
 src/mainboard/google/veyron_danger/board.h      |  2 ++
 src/mainboard/google/veyron_danger/mainboard.c  |  4 +--
 src/mainboard/google/veyron_danger/romstage.c   |  6 ----
 src/mainboard/google/veyron_danger/sdmmc.c      | 45 +++++++++++++++++++++++++
 5 files changed, 50 insertions(+), 9 deletions(-)

diff --git a/src/mainboard/google/veyron_danger/Makefile.inc b/src/mainboard/google/veyron_danger/Makefile.inc
index a027c6d..1d312c3 100644
--- a/src/mainboard/google/veyron_danger/Makefile.inc
+++ b/src/mainboard/google/veyron_danger/Makefile.inc
@@ -27,6 +27,7 @@ verstage-y += reset.c
 
 romstage-y += boardid.c
 romstage-y += romstage.c
+romstage-y += sdmmc.c
 romstage-y += sdram_configs.c
 romstage-y += reset.c
 
@@ -34,6 +35,7 @@ ramstage-y += boardid.c
 ramstage-y += chromeos.c
 ramstage-y += mainboard.c
 ramstage-y += reset.c
+ramstage-y += sdmmc.c
 
 bootblock-y += memlayout.ld
 verstage-y += memlayout.ld
diff --git a/src/mainboard/google/veyron_danger/board.h b/src/mainboard/google/veyron_danger/board.h
index 8f62078..aa703c2 100644
--- a/src/mainboard/google/veyron_danger/board.h
+++ b/src/mainboard/google/veyron_danger/board.h
@@ -27,6 +27,8 @@
 #define GPIO_RESET	GPIO(0, B, 5)
 #define GPIO_LCDC_BL	GPIO(7, A, 7)
 
+void sdmmc_power_off(void);
+void sdmmc_power_on(void);
 void setup_chromeos_gpios(void);
 
 #endif	/* __MAINBOARD_GOOGLE_VEYRON_DANGER_BOARD_H */
diff --git a/src/mainboard/google/veyron_danger/mainboard.c b/src/mainboard/google/veyron_danger/mainboard.c
index 621d347..7b06742 100644
--- a/src/mainboard/google/veyron_danger/mainboard.c
+++ b/src/mainboard/google/veyron_danger/mainboard.c
@@ -55,9 +55,7 @@ static void configure_sdmmc(void)
 	/* use sdmmc0 io, disable JTAG function */
 	write32(&rk3288_grf->soc_con0, RK_CLRBITS(1 << 12));
 
-	/* Note: these power rail definitions are copied in romstage.c */
-	rk808_configure_ldo(4, 3300);	/* VCCIO_SD */
-	rk808_configure_ldo(5, 3300);	/* VCC33_SD */
+	sdmmc_power_on();
 
 	gpio_input(GPIO(7, A, 5));	/* SDMMC_DET_L */
 }
diff --git a/src/mainboard/google/veyron_danger/romstage.c b/src/mainboard/google/veyron_danger/romstage.c
index 68ab661..80d9081 100644
--- a/src/mainboard/google/veyron_danger/romstage.c
+++ b/src/mainboard/google/veyron_danger/romstage.c
@@ -78,12 +78,6 @@ static void configure_l2ctlr(void)
 	write_l2ctlr(l2ctlr);
 }
 
-static void sdmmc_power_off(void)
-{
-	rk808_configure_ldo(4, 0); /* VCCIO_SD */
-	rk808_configure_ldo(5, 0); /* VCC33_SD */
-}
-
 void main(void)
 {
 #if CONFIG_COLLECT_TIMESTAMPS
diff --git a/src/mainboard/google/veyron_danger/sdmmc.c b/src/mainboard/google/veyron_danger/sdmmc.c
new file mode 100644
index 0000000..b60f2e6
--- /dev/null
+++ b/src/mainboard/google/veyron_danger/sdmmc.c
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "board.h"
+
+#include <soc/rk808.h>
+
+static void sdmmc_power(int enable)
+{
+	switch (board_id()) {
+	case 0:
+		/* VCC33_SD is tied to VCC33_SYS and is always on */
+		break;
+	default:
+		rk808_configure_ldo(4, enable ? 3300 : 0); /* VCC33_SD_LDO */
+		rk808_configure_ldo(5, enable ? 3300 : 0); /* VCCIO_SD */
+		break;
+	}
+}
+
+void sdmmc_power_off(void)
+{
+	sdmmc_power(0);
+}
+
+void sdmmc_power_on(void)
+{
+	sdmmc_power(1);
+}