[coreboot-gerrit] Patch set updated for coreboot: cpu/x86: Add more MTRR symbols

Leroy P Leahy (leroy.p.leahy@intel.com) gerrit at coreboot.org
Tue Jun 23 00:30:37 CEST 2015


Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10588

-gerrit

commit a10606b58804b34371ddd243bd96ead6e4bf2038
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Thu Jun 18 10:55:19 2015 -0700

    cpu/x86: Add more MTRR symbols
    
    BRANCH=none
    BUG=None
    TEST=Build and run on strago
    
    Change-Id: Ia3740353eb16f2a2192cad8c45645f845bf39475
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
 src/include/cpu/x86/mtrr.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index 95cabf1..86ce57b 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -12,10 +12,17 @@
 #define MTRR_NUM_TYPES       7
 
 #define MTRRcap_MSR     0x0fe
+
+#define MTRRcapSmrr		(1 << 11)
+#define MTRRcapWc		(1 << 10)
+#define MTRRcapFix		(1 << 8)
+#define MTRRcapVcnt		0xff
+
 #define MTRRdefType_MSR 0x2ff
 
 #define MTRRdefTypeEn		(1 << 11)
 #define MTRRdefTypeFixEn	(1 << 10)
+#define MTRRdefTypeType		0xff
 
 #define SMRRphysBase_MSR 0x1f2
 #define SMRRphysMask_MSR 0x1f3



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