[coreboot-gerrit] Patch set updated for coreboot: 2fd1f22 AMD K8 fam10: Always have SB_HT_CHAIN_ON_BUS0

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Thu Jun 4 12:03:33 CEST 2015


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8561

-gerrit

commit 2fd1f22bcc62af9dc4eac5254c368a0e1edd71a1
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Thu Feb 5 15:43:23 2015 +0200

    AMD K8 fam10: Always have SB_HT_CHAIN_ON_BUS0
    
    Change-Id: I65fad1cfba95f0ee1ed3f7f7a57d874144da1e40
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/northbridge/amd/amdfam10/Kconfig       | 3 ---
 src/northbridge/amd/amdfam10/northbridge.c | 5 +----
 src/northbridge/amd/amdk8/Kconfig          | 3 ---
 src/northbridge/amd/amdk8/northbridge.c    | 5 +----
 4 files changed, 2 insertions(+), 14 deletions(-)

diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig
index fa8a26a..0987a1f 100644
--- a/src/northbridge/amd/amdfam10/Kconfig
+++ b/src/northbridge/amd/amdfam10/Kconfig
@@ -64,9 +64,6 @@ config SB_HT_CHAIN_UNITID_OFFSET_ONLY
 	bool
 	default n
 
-config SB_HT_CHAIN_ON_BUS0
-	def_bool y
-
 config HT_CHAIN_DISTRIBUTE
 	def_bool n
 
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index e4d32f9..df0d712 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -216,7 +216,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool
 		 * so we set the subordinate bus number to 0xff for the moment.
 		 */
 
-		if (!CONFIG_SB_HT_CHAIN_ON_BUS0 || !is_sblink)
+		if (!is_sblink)
 			max++;
 
 		/* One node can have 8 link and segn is the same. */
@@ -280,9 +280,6 @@ static void relocate_sb_ht_chain(void)
 	struct bus *link, *prev = NULL;
 	u8 sblink;
 
-	if (!CONFIG_SB_HT_CHAIN_ON_BUS0)
-		return;
-
 	dev = dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB, 0));
 	sblink = (pci_read_config32(dev, 0x64)>>8) & 7;
 	link = dev->link_list;
diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig
index b293ce3..21d3c29 100644
--- a/src/northbridge/amd/amdk8/Kconfig
+++ b/src/northbridge/amd/amdk8/Kconfig
@@ -64,9 +64,6 @@ config SB_HT_CHAIN_UNITID_OFFSET_ONLY
 	bool
 	default n
 
-config SB_HT_CHAIN_ON_BUS0
-	def_bool y
-
 config HT_CHAIN_DISTRIBUTE
 	def_bool n
 
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 3ac626d..84c1144 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -179,7 +179,7 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_
 		 * so we set the subordinate bus number to 0xff for the moment.
 		 */
 
-		if (!CONFIG_SB_HT_CHAIN_ON_BUS0 || !is_sblink)
+		if (!is_sblink)
 			max++;
 
 		/* Second chain will be on 0x40, third 0x80, forth 0xc0. */
@@ -249,9 +249,6 @@ static void relocate_sb_ht_chain(void)
 	struct bus *link, *prev = NULL;
 	u8 sblink;
 
-	if (!CONFIG_SB_HT_CHAIN_ON_BUS0)
-		return;
-
 	dev = dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB, 0));
 	sblink = (pci_read_config32(dev, 0x64)>>8) & 3;
 	link = dev->link_list;



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