[coreboot-gerrit] Patch merged into coreboot/master: d42ee15 libpayload: usb: Support MTK xHCI host controller

gerrit at coreboot.org gerrit at coreboot.org
Wed Jun 3 11:12:01 CEST 2015


the following patch was just integrated into master:
commit d42ee150a0330f22986ad7237c9e70cebd9d995c
Author: Yidi Lin <yidi.lin at mediatek.com>
Date:   Thu May 7 15:36:04 2015 +0800

    libpayload: usb: Support MTK xHCI host controller
    
    1. There is a mis-understanding to calculate the value of TD Size
       in Normal TRB. For MTK's xHCI controller it defines a number of
       packets that remain to be transferred for a TD after processing
       all Max packets in all previous TRBs, that means don't include the
       current TRB's.
    2. To minimize the scheduling effort for synchronous endpoints in xHC,
       the MTK architecture defines some extra SW scheduling parameters for
       HW. According to these parameters provided by SW, the xHC can easily
       decide whether a synchronous endpoint should be scheduled in a specific
       uFrame. The extra SW scheduling parameters are put into reserved DWs
       in Slot and Endpoint Context. But in coreboot synchronous transfer can
       be ignored, so only two fields are set to a default value 1 to support
       bulk and interrupt transfers, and others are set to zero.
    3. For control transfer, it is better to read back doorbell register or add
       a memory barrier after ringing the doorbell to flush posted write.
       Otherwise the first command will be aborted on MTK's xHCI controller.
    4. Before send commands to a port, the Port Power in PORTSC register should
       be set to 1 on MTK's xHCI so a hook function of enable_port in
       generic_hub_ops_t struct is provided.
    
    Change-Id: Ie8878b50c048907ebf939b3f6657535a54877fde
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 738609c11f16264c6e6429d478b2040cb391fe41
    Original-Change-Id: Id9156892699e2e42a166c77fbf6690049abe953b
    Original-Signed-off-by: Chunfeng Yun <chunfeng.yun at mediatek.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/265362
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
    Original-Commit-Queue: Yidi Lin <yidi.lin at mediatek.com>
    Original-Tested-by: Yidi Lin <yidi.lin at mediatek.com>
    Reviewed-on: http://review.coreboot.org/10389
    Reviewed-by: Patrick Georgi <pgeorgi at google.com>
    Tested-by: build bot (Jenkins)


See http://review.coreboot.org/10389 for details.

-gerrit



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