[coreboot-gerrit] New patch to review for coreboot: skylake: provide pcr helper to get a port's register space

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11068

-gerrit

commit a6d75bb195b34253c610266926293f8c9e5b15cd
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Thu Jul 23 20:48:06 2015 -0500

    skylake: provide pcr helper to get a port's register space
    
    In order to aid users of the PCR register space provide
    pcr_port_regs().
    
    BUG=chrome-os-partner:42982
    BRANCH=None
    TEST=Built glados.
    
    Change-Id: Ibfcffbfd4304a59dd80a88dc18404d3a5dfa2f5d
    Signed-off-by: Patrick Georgi <pgeorgi at google.com>
    Original-Commit-Id: 5f796319ba1d00557e32bf18309fc3cc772ccae0
    Original-Change-Id: I21243d18c1bbd19468f8f279b2daa4e40a8f0699
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/288193
    Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/soc/intel/skylake/include/soc/pcr.h | 5 +++++
 src/soc/intel/skylake/pcr.c             | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/src/soc/intel/skylake/include/soc/pcr.h b/src/soc/intel/skylake/include/soc/pcr.h
index 3f8ee2f..c8a4425 100644
--- a/src/soc/intel/skylake/include/soc/pcr.h
+++ b/src/soc/intel/skylake/include/soc/pcr.h
@@ -85,6 +85,8 @@
 #define PID_DMI		0xEF
 
 #if !defined(__ASSEMBLER__) && !defined(__ACPI__)
+#include <stdint.h>
+
 /* All these return 0 on success and < 0 on errror. */
 int pcr_read32(u8 pid, u16 offset, u32 *outdata);
 int pcr_read16(u8 pid, u16 offset, u16 *outdata);
@@ -95,6 +97,9 @@ int pcr_write8(u8 pid, u16 offset, u8 indata);
 int pcr_andthenor32(u8 pid, u16 offset, u32 anddata, u32 ordata);
 int pcr_andthenor16(u8 pid, u16 offset, u16 anddata, u16 ordata);
 int pcr_andthenor8(u8 pid, u16 offset, u8 anddata, u8 ordata);
+
+/* Get the starting address of the port's registers. */
+uint8_t *pcr_port_regs(u8 pid);
 #endif /* if !defined(__ASSEMBLER__) && !defined(__ACPI__) */
 
 #endif /* _SOC_PCR_H_ */
diff --git a/src/soc/intel/skylake/pcr.c b/src/soc/intel/skylake/pcr.c
index 0e97265..7efbb25 100644
--- a/src/soc/intel/skylake/pcr.c
+++ b/src/soc/intel/skylake/pcr.c
@@ -34,6 +34,11 @@ static inline void *pcr_reg_address(u8 pid, u16 offset)
 	return (void *)reg_addr;
 }
 
+uint8_t *pcr_port_regs(u8 pid)
+{
+	return pcr_reg_address(pid, 0);
+}
+
 /*
  * Read PCR register. (This is internal function)
  * It returns PCR register and size in 1/2/4 bytes.