[coreboot-gerrit] New patch to review for coreboot: cyan/strago: Disable wwan

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Mon Jul 20 22:29:00 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10992

-gerrit

commit 8dd14484672cd42d9d90bbaba9d8a88eb7f2af5e
Author: Jagadish Krishnamoorthy <jagadish.krishnamoorthy at intel.com>
Date:   Tue Jun 23 19:23:25 2015 -0700

    cyan/strago: Disable wwan
    
    Disabling the wwan gpio line
    since wwan is not used.
    
    BRANCH=none
    BUG=none
    TEST=wwan should not connect to network on cyan/strago.
    
    Change-Id: I9d2e5d5b185a4622218e894d3b092afe15e09289
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 9a20c602b3bb768baa38b17e21cb4e5b0d9249ef
    Original-Change-Id: Ib8d5fd15a172ef898ce675a85c2ea3e5f5c79144
    Original-Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/285304
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/mainboard/google/cyan/gpio.c         | 2 +-
 src/mainboard/google/cyan/gpio_pre_evt.c | 2 +-
 src/mainboard/intel/strago/gpio.c        | 2 +-
 src/mainboard/intel/strago/gpio_bcrd2.c  | 2 +-
 src/mainboard/intel/strago/gpio_dvt.c    | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/mainboard/google/cyan/gpio.c b/src/mainboard/google/cyan/gpio.c
index 8edbad6..3cd319d 100644
--- a/src/mainboard/google/cyan/gpio.c
+++ b/src/mainboard/google/cyan/gpio.c
@@ -94,7 +94,7 @@ static const struct soc_gpio_map  gpsw_gpio_map[] = {
 	GPIO_NC, /* GPO FST_SPI_CS1_B */
 	Native_M1, /* 05 FST_SPI_D1 */
 	Native_M1, /* 06 FST_SPI_CS0_B */
-	GPIO_OUT_HIGH, /* 07 FST_SPI_CS2_B */
+	GPIO_NC, /* 07 FST_SPI_CS2_B */
 	GPIO_NC, /* 15 UART1_RTS_B */
 	Native_M2, /* 16 UART1_RXD */
 	GPIO_NC, /* 17 UART2_RXD */
diff --git a/src/mainboard/google/cyan/gpio_pre_evt.c b/src/mainboard/google/cyan/gpio_pre_evt.c
index 2ccc5d5..eb285ac 100644
--- a/src/mainboard/google/cyan/gpio_pre_evt.c
+++ b/src/mainboard/google/cyan/gpio_pre_evt.c
@@ -96,7 +96,7 @@ static const struct soc_gpio_map  gpsw_gpio_map[] = {
 	GPIO_NC, /* GPO FST_SPI_CS1_B */
 	Native_M1, /* 05 FST_SPI_D1 */
 	Native_M1, /* 06 FST_SPI_CS0_B */
-	GPIO_OUT_HIGH, /* 07 FST_SPI_CS2_B */
+	GPIO_NC, /* 07 FST_SPI_CS2_B */
 	GPIO_NC, /* 15 UART1_RTS_B */
 	Native_M2, /* 16 UART1_RXD */
 	GPIO_NC, /* 17 UART2_RXD */
diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c
index 53d9039..3ca07e6 100755
--- a/src/mainboard/intel/strago/gpio.c
+++ b/src/mainboard/intel/strago/gpio.c
@@ -96,7 +96,7 @@ static const struct soc_gpio_map  gpsw_gpio_map[] = {
 	GPIO_NC, /* GPO FST_SPI_CS1_B */
 	Native_M1, /* 05 FST_SPI_D1 */
 	Native_M1, /* 06 FST_SPI_CS0_B */
-	GPIO_OUT_HIGH, /* 07 FST_SPI_CS2_B */
+	GPIO_NC, /* 07 FST_SPI_CS2_B */
 	GPIO_NC, /* 15 UART1_RTS_B */
 	Native_M2, /* 16 UART1_RXD */
 	GPIO_NC, /* 17 UART2_RXD */
diff --git a/src/mainboard/intel/strago/gpio_bcrd2.c b/src/mainboard/intel/strago/gpio_bcrd2.c
index 3a4123d..b63db0b 100644
--- a/src/mainboard/intel/strago/gpio_bcrd2.c
+++ b/src/mainboard/intel/strago/gpio_bcrd2.c
@@ -96,7 +96,7 @@ static const struct soc_gpio_map  gpsw_gpio_map[] = {
 	GPIO_NC, /* GPO FST_SPI_CS1_B */
 	Native_M1, /* 05 FST_SPI_D1 */
 	Native_M1, /* 06 FST_SPI_CS0_B */
-	GPIO_OUT_HIGH, /* 07 FST_SPI_CS2_B */
+	GPIO_NC, /* 07 FST_SPI_CS2_B */
 	GPIO_NC, /* 15 UART1_RTS_B */
 	Native_M2, /* 16 UART1_RXD */
 	GPIO_NC, /* 17 UART2_RXD */
diff --git a/src/mainboard/intel/strago/gpio_dvt.c b/src/mainboard/intel/strago/gpio_dvt.c
index 3c13f45..920c9d4 100755
--- a/src/mainboard/intel/strago/gpio_dvt.c
+++ b/src/mainboard/intel/strago/gpio_dvt.c
@@ -94,7 +94,7 @@ static const struct soc_gpio_map  gpsw_gpio_map[] = {
 	GPIO_NC, /* GPO FST_SPI_CS1_B */
 	Native_M1, /* 05 FST_SPI_D1 */
 	Native_M1, /* 06 FST_SPI_CS0_B */
-	GPIO_OUT_HIGH, /* 07 FST_SPI_CS2_B */
+	GPIO_NC, /* 07 FST_SPI_CS2_B */
 	GPIO_NC, /* 15 UART1_RTS_B */
 	Native_M2, /* 16 UART1_RXD */
 	GPIO_NC, /* 17 UART2_RXD */



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