[coreboot-gerrit] New patch to review for coreboot: intel raminit: improve logging
Patrick Rudolph (siro@das-labor.org)
gerrit at coreboot.org
Sun Jul 12 17:16:17 CEST 2015
Patrick Rudolph (siro at das-labor.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10891
-gerrit
commit 09e69a72e16bea1cad80c0a9bc417dd21f4554b0
Author: Patrick Rudolph <siro at das-labor.org>
Date: Sun Jul 12 17:06:41 2015 +0200
intel raminit: improve logging
Print the old timB value to observes changes made.
Change-Id: Iecec4918f1d95560b6e7933a169ccce83fcf073d
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
src/northbridge/intel/sandybridge/raminit_native.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c
index 9abee23..d56d60d 100644
--- a/src/northbridge/intel/sandybridge/raminit_native.c
+++ b/src/northbridge/intel/sandybridge/raminit_native.c
@@ -2304,7 +2304,7 @@ static int get_timB_high_adjust(u64 val)
static void adjust_high_timB(ramctr_timing * ctrl)
{
- int channel, slotrank, lane;
+ int channel, slotrank, lane, old;
write32(DEFAULT_MCHBAR + 0x3400, 0x200);
FOR_ALL_POPULATED_CHANNELS {
fill_pattern1(ctrl, channel);
@@ -2379,12 +2379,13 @@ static void adjust_high_timB(ramctr_timing * ctrl)
res |=
((u64) read32(DEFAULT_MCHBAR + lane_registers[lane] +
0x100 * channel + 8)) << 32;
+ old = ctrl->timings[channel][slotrank].lanes[lane].timB;
ctrl->timings[channel][slotrank].lanes[lane].timB +=
get_timB_high_adjust(res) * 64;
printk(BIOS_DEBUG, "High adjust %d:%016llx\n", lane, res);
- printram("Bval+: %d, %d, %d, %x\n", channel,
- slotrank, lane,
+ printram("Bval+: %d, %d, %d, %x -> %x\n", channel,
+ slotrank, lane, old,
ctrl->timings[channel][slotrank].lanes[lane].
timB);
}
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