[coreboot-gerrit] Patch set updated for coreboot: intel raminit: whitespace fixes
Patrick Rudolph (siro@das-labor.org)
gerrit at coreboot.org
Sun Jul 12 17:16:14 CEST 2015
Patrick Rudolph (siro at das-labor.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10888
-gerrit
commit b111006e83902bf8dd1b0fe18e0cfa97e5e22f95
Author: Patrick Rudolph <siro at das-labor.org>
Date: Sun Jul 12 11:39:45 2015 +0200
intel raminit: whitespace fixes
Remove whitespace errors.
Change-Id: If69244a5d47424e3e984fdf782ea9d2d3c466d86
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
src/northbridge/intel/sandybridge/raminit_native.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c
index 3740a02..02825f8 100644
--- a/src/northbridge/intel/sandybridge/raminit_native.c
+++ b/src/northbridge/intel/sandybridge/raminit_native.c
@@ -2370,16 +2370,16 @@ static void adjust_high_timB(ramctr_timing * ctrl)
wait_428c(channel);
FOR_ALL_LANES {
u64 res =
- read32(DEFAULT_MCHBAR + lane_registers[lane] +
- 0x100 * channel + 4);
- res |=
- ((u64) read32(DEFAULT_MCHBAR + lane_registers[lane] +
- 0x100 * channel + 8)) << 32;
- ctrl->timings[channel][slotrank].lanes[lane].timB +=
- get_timB_high_adjust(res) * 64;
-
- printk(BIOS_DEBUG, "High adjust %d:%016llx\n", lane, res);
- printram("Bval+: %d, %d, %d, %x\n", channel,
+ read32(DEFAULT_MCHBAR + lane_registers[lane] +
+ 0x100 * channel + 4);
+ res |=
+ ((u64) read32(DEFAULT_MCHBAR + lane_registers[lane] +
+ 0x100 * channel + 8)) << 32;
+ ctrl->timings[channel][slotrank].lanes[lane].timB +=
+ get_timB_high_adjust(res) * 64;
+
+ printk(BIOS_DEBUG, "High adjust %d:%016llx\n", lane, res);
+ printram("Bval+: %d, %d, %d, %x\n", channel,
slotrank, lane,
ctrl->timings[channel][slotrank].lanes[lane].
timB);
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