[coreboot-gerrit] Patch set updated for coreboot: src/Kconfig: Remove Intel chipsets from CBFS_SIZE overrides
Martin Roth (gaumless@gmail.com)
gerrit at coreboot.org
Fri Jul 10 05:15:49 CEST 2015
Martin Roth (gaumless at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10877
-gerrit
commit b8b72c934cea52bb71e9c0d80a991bcb9ff06e98
Author: Martin Roth <gaumless at gmail.com>
Date: Thu Jul 9 21:06:02 2015 -0600
src/Kconfig: Remove Intel chipsets from CBFS_SIZE overrides
Now that all the chipsets that use an Intel Firmware Descriptor are
switched to use the common IFD code, the CBFS_SIZE default can be
switched to just change the default size based on HAVE_INTEL_FIRMWARE/
Change-Id: I71c9854b39b76669f287bf606d0db5ed76b9b867
Signed-off-by: Martin Roth <gaumless at gmail.com>
---
src/Kconfig | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig
index 9c0d1cf..519aa10 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -347,12 +347,7 @@ source "src/mainboard/Kconfig"
config CBFS_SIZE
hex "Size of CBFS filesystem in ROM"
- default 0x100000 if HAVE_INTEL_FIRMWARE || \
- NORTHBRIDGE_INTEL_GM45 || NORTHBRIDGE_INTEL_SANDYBRIDGE || \
- NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE || \
- NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE || \
- NORTHBRIDGE_INTEL_NEHALEM || SOC_INTEL_BRASWELL || \
- SOC_INTEL_BROADWELL
+ default 0x100000 if HAVE_INTEL_FIRMWARE
default ROM_SIZE
help
This is the part of the ROM actually managed by CBFS, located at the
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