[coreboot-gerrit] New patch to review for coreboot: ipq8064: enable timestamp collection

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Wed Jul 8 10:13:46 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10847

-gerrit

commit 2fd0015e5234a477ca34726b847a3caea9a08463
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Fri Dec 12 17:54:27 2014 -0800

    ipq8064: enable timestamp collection
    
    One kilobyte of SRAM needs to be allocated and the feature enabled.
    
    BRANCH=storm
    BUG=chrome-os-partner:34161
    TEST=timer error messages do not show up in the coreboot log any more
    
    Change-Id: I1d5e5521bf9ae495d4f4f50ff017c846a8420719
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: ffb9bfb0cdfab1391f8ae07669a2ab6b24d88dd7
    Original-Change-Id: I60066672334db36f5e7adbef6794d7afd177d292
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/235893
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/qualcomm/ipq806x/Kconfig                  | 1 +
 src/soc/qualcomm/ipq806x/include/soc/memlayout.ld | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index ecc52e2..9a1e4f9 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -7,6 +7,7 @@ config SOC_QC_IPQ806X
 	select ARCH_RAMSTAGE_ARMV7
 	select BOOTBLOCK_CONSOLE
 	select CHROMEOS_VBNV_FLASH
+	select HAS_PRECBMEM_TIMESTAMP_REGION
 	select HAVE_UART_SPECIAL
 	select SPI_ATOMIC_SEQUENCING
 	select GENERIC_GPIO_LIB
diff --git a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
index 426d35b..cf417ba 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
+++ b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
@@ -34,8 +34,9 @@ SECTIONS
 	OVERLAP_VERSTAGE_ROMSTAGE(0x2A012000, 64K)
 	VBOOT2_WORK(0x2A022000, 16K)
 	PRERAM_CBMEM_CONSOLE(0x2A026000, 32K)
+	TIMESTAMP(0x2A02E000, 1K)
 
-/*	0x2e400..0x3F000 67KB free */
+/*	0x2e400..0x3F000  67 KB free */
 
 /* Keep the below area reserved at all times, it is used by various QCA
    components as shared data



More information about the coreboot-gerrit mailing list