[coreboot-gerrit] New patch to review for coreboot: [NOT YET FOR MERGE] azalia: #6840 followup

Jonathan A. Kollasch (jakllsch@kollasch.net) gerrit at coreboot.org
Tue Jul 7 20:12:45 CEST 2015


Jonathan A. Kollasch (jakllsch at kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10826

-gerrit

commit 09329c0e16137738cc29b5fb5e34d31a42bf1410
Author: Jonathan A. Kollasch <jakllsch at kollasch.net>
Date:   Tue Jul 7 12:57:46 2015 -0500

    [NOT YET FOR MERGE] azalia: #6840 followup
    
     - Nvidia MCP55 HDA verb setup was silently broken by #6840
     - Intel SCH HDA verb setup was probably broken by #6840
     - Intel Broadwell HDA verb setup  seems to ignore the spirit of #6840
    
    Change-Id: If7aae69f5171db67055ffe220bdff392caaa5d9f
    Signed-off-by: Jonathan A. Kollasch <jakllsch at kollasch.net>
---
 src/soc/intel/broadwell/Makefile.inc      | 2 ++
 src/southbridge/intel/sch/Makefile.inc    | 1 +
 src/southbridge/nvidia/mcp55/Makefile.inc | 4 ++++
 src/southbridge/nvidia/mcp55/azalia.c     | 8 +++-----
 4 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc
index d7845e6..4b14ff8 100644
--- a/src/soc/intel/broadwell/Makefile.inc
+++ b/src/soc/intel/broadwell/Makefile.inc
@@ -66,6 +66,8 @@ ramstage-y += ehci.c
 ramstage-y += xhci.c
 smm-y      += xhci.c
 
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
+
 ifeq ($(CONFIG_USBDEBUG),y)
 ramstage-y += usbdebug.c
 romstage-y += usbdebug.c
diff --git a/src/southbridge/intel/sch/Makefile.inc b/src/southbridge/intel/sch/Makefile.inc
index db876a1..0b21801 100644
--- a/src/southbridge/intel/sch/Makefile.inc
+++ b/src/southbridge/intel/sch/Makefile.inc
@@ -36,6 +36,7 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm/smmrelocate.S
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
 
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
 
 # We don't ship that, but booting without it is bound to fail
 cbfs-files-$(CONFIG_HAVE_CMC) += cmc.bin
diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc
index 3e24f1c..fb9c3fb 100644
--- a/src/southbridge/nvidia/mcp55/Makefile.inc
+++ b/src/southbridge/nvidia/mcp55/Makefile.inc
@@ -20,6 +20,10 @@ ramstage-y += reset.c
 romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
 ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 
+ifeq ($(CONFIG_MCP55_USE_AZA),y)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
+endif
+
 chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc
 bootblock-y += romstrap.ld
 
diff --git a/src/southbridge/nvidia/mcp55/azalia.c b/src/southbridge/nvidia/mcp55/azalia.c
index 8285749..725b7b1 100644
--- a/src/southbridge/nvidia/mcp55/azalia.c
+++ b/src/southbridge/nvidia/mcp55/azalia.c
@@ -19,6 +19,7 @@
  */
 
 #include <console/console.h>
+#include <device/azalia_device.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -86,10 +87,7 @@ no_codec:
 	return 0;
 }
 
-u32 *cim_verb_data = NULL;
-u32 cim_verb_data_size = 0;
-
-static u32 find_verb(struct device *dev, u32 viddid, u32 **verb)
+static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 {
 	int idx = 0;
 
@@ -155,7 +153,7 @@ static int wait_for_valid(u8 *base)
 static void codec_init(struct device *dev, u8 *base, int addr)
 {
 	u32 reg32, verb_size;
-	u32 *verb;
+	const u32 *verb;
 	int i;
 
 	printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);



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