[coreboot-gerrit] Patch set updated for coreboot: b9b1b70 ARM romstages: Support and fix COLLECT_TIMESTAMPS
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Wed Jan 28 00:23:34 CET 2015
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8021
-gerrit
commit b9b1b7041e02d82932044febc7b4e05c820853bb
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Wed Dec 31 08:50:36 2014 +0200
ARM romstages: Support and fix COLLECT_TIMESTAMPS
Change-Id: I53959eb937c1db3c4211e23a6476340383a33c5b
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/mainboard/google/daisy/romstage.c | 12 ++++++++++++
src/mainboard/google/nyan/romstage.c | 12 ++++--------
src/mainboard/google/nyan_big/romstage.c | 12 ++++--------
src/mainboard/google/nyan_blaze/romstage.c | 12 ++++--------
src/mainboard/google/peach_pit/romstage.c | 11 +++++++++++
5 files changed, 35 insertions(+), 24 deletions(-)
diff --git a/src/mainboard/google/daisy/romstage.c b/src/mainboard/google/daisy/romstage.c
index 9b35c4a..46c6593 100644
--- a/src/mainboard/google/daisy/romstage.c
+++ b/src/mainboard/google/daisy/romstage.c
@@ -22,6 +22,7 @@
#include <armv7.h>
#include <cbfs.h>
#include <cbmem.h>
+#include <timestamp.h>
#include <arch/cache.h>
#include <arch/exception.h>
@@ -147,6 +148,9 @@ void main(void)
void *entry;
int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);
+ timestamp_init(timestamp_get());
+ timestamp_add_now(TS_START_ROMSTAGE);
+
/* Clock must be initialized before console_init, otherwise you may need
* to re-initialize serial console drivers again. */
mem = setup_clock();
@@ -155,8 +159,13 @@ void main(void)
exception_init();
setup_power(is_resume);
+
+ timestamp_add_now(TS_BEFORE_INITRAM);
+
setup_memory(mem, is_resume);
+ timestamp_add_now(TS_AFTER_INITRAM);
+
/* This needs to happen on normal boots and on resume. */
trustzone_init();
@@ -174,5 +183,8 @@ void main(void)
cbmem_initialize_empty();
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
+
+ timestamp_add_now(TS_END_ROMSTAGE);
+
stage_exit(entry);
}
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index 749b87d..1af3c31 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -149,9 +149,8 @@ static void configure_tpm_i2c_bus(void)
static void __attribute__((noinline)) romstage(void)
{
-#if CONFIG_COLLECT_TIMESTAMPS
- uint64_t romstage_start_time = timestamp_get();
-#endif
+ timestamp_init(0);
+ timestamp_add_now(TS_START_ROMSTAGE);
configure_l2ctlr();
configure_l2actlr();
@@ -212,9 +211,6 @@ static void __attribute__((noinline)) romstage(void)
cbmem_initialize_empty();
- timestamp_init(0);
- timestamp_add(TS_START_ROMSTAGE, romstage_start_time);
-
// Enable additional peripherals we need for ROM stage.
clock_enable_clear_reset(0, CLK_H_SBC1, CLK_U_I2C3, 0, 0, 0);
@@ -225,10 +221,10 @@ static void __attribute__((noinline)) romstage(void)
vboot_verify_firmware(romstage_handoff_find_or_add());
- timestamp_add(TS_START_COPYRAM, timestamp_get());
+ timestamp_add_now(TS_START_COPYRAM);
void *entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA,
"fallback/coreboot_ram");
- timestamp_add(TS_END_COPYRAM, timestamp_get());
+ timestamp_add_now(TS_END_COPYRAM);
stage_exit(entry);
}
diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c
index 749b87d..1af3c31 100644
--- a/src/mainboard/google/nyan_big/romstage.c
+++ b/src/mainboard/google/nyan_big/romstage.c
@@ -149,9 +149,8 @@ static void configure_tpm_i2c_bus(void)
static void __attribute__((noinline)) romstage(void)
{
-#if CONFIG_COLLECT_TIMESTAMPS
- uint64_t romstage_start_time = timestamp_get();
-#endif
+ timestamp_init(0);
+ timestamp_add_now(TS_START_ROMSTAGE);
configure_l2ctlr();
configure_l2actlr();
@@ -212,9 +211,6 @@ static void __attribute__((noinline)) romstage(void)
cbmem_initialize_empty();
- timestamp_init(0);
- timestamp_add(TS_START_ROMSTAGE, romstage_start_time);
-
// Enable additional peripherals we need for ROM stage.
clock_enable_clear_reset(0, CLK_H_SBC1, CLK_U_I2C3, 0, 0, 0);
@@ -225,10 +221,10 @@ static void __attribute__((noinline)) romstage(void)
vboot_verify_firmware(romstage_handoff_find_or_add());
- timestamp_add(TS_START_COPYRAM, timestamp_get());
+ timestamp_add_now(TS_START_COPYRAM);
void *entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA,
"fallback/coreboot_ram");
- timestamp_add(TS_END_COPYRAM, timestamp_get());
+ timestamp_add_now(TS_END_COPYRAM);
stage_exit(entry);
}
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index a23937e..2e52648 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -149,9 +149,8 @@ static void configure_tpm_i2c_bus(void)
static void __attribute__((noinline)) romstage(void)
{
-#if CONFIG_COLLECT_TIMESTAMPS
- uint64_t romstage_start_time = timestamp_get();
-#endif
+ timestamp_init(0);
+ timestamp_add_now(TS_START_ROMSTAGE);
configure_l2ctlr();
configure_l2actlr();
@@ -212,9 +211,6 @@ static void __attribute__((noinline)) romstage(void)
cbmem_initialize_empty();
- timestamp_init(0);
- timestamp_add(TS_START_ROMSTAGE, romstage_start_time);
-
// Enable additional peripherals we need for ROM stage.
clock_enable_clear_reset(0, CLK_H_SBC1, CLK_U_I2C3, 0, 0, 0);
@@ -229,10 +225,10 @@ static void __attribute__((noinline)) romstage(void)
vboot_verify_firmware(romstage_handoff_find_or_add());
#endif
- timestamp_add(TS_START_COPYRAM, timestamp_get());
+ timestamp_add_now(TS_START_COPYRAM);
void *entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA,
"fallback/coreboot_ram");
- timestamp_add(TS_END_COPYRAM, timestamp_get());
+ timestamp_add_now(TS_END_COPYRAM);
stage_exit(entry);
}
diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c
index 248809d..ce4e399 100644
--- a/src/mainboard/google/peach_pit/romstage.c
+++ b/src/mainboard/google/peach_pit/romstage.c
@@ -23,6 +23,7 @@
#include <armv7.h>
#include <cbfs.h>
#include <cbmem.h>
+#include <timestamp.h>
#include <arch/cache.h>
#include <arch/exception.h>
@@ -234,6 +235,9 @@ void main(void)
exynos5420_config_smp();
power_init_failed = setup_power(is_resume);
+ timestamp_init(timestamp_get());
+ timestamp_add_now(TS_START_ROMSTAGE);
+
/* Clock must be initialized before console_init, otherwise you may need
* to re-initialize serial console drivers again. */
system_clock_init();
@@ -248,8 +252,12 @@ void main(void)
/* re-initialize PMIC I2C channel after (re-)setting system clocks */
i2c_init(PMIC_I2C_BUS, 1000000, 0x00); /* 1MHz */
+ timestamp_add_now(TS_BEFORE_INITRAM);
+
setup_memory(&mem_timings, is_resume);
+ timestamp_add_now(TS_AFTER_INITRAM);
+
primitive_mem_test();
trustzone_init();
@@ -272,5 +280,8 @@ void main(void)
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
simple_spi_test();
+
+ timestamp_add_now(TS_END_ROMSTAGE);
+
stage_exit(entry);
}
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