[coreboot-gerrit] Patch set updated for coreboot: 5ae21f6 CBMEM: Move cbmemc_reinit()
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Tue Jan 27 20:00:55 CET 2015
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7859
-gerrit
commit 5ae21f670ec5fe4c3a265f5147beaaa6bf20cfbc
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Wed Dec 31 19:29:02 2014 +0200
CBMEM: Move cbmemc_reinit()
This replaces need for separate cbmemc_reinit() calls made
via CAR_MIGRATE() and in ramstage.
Change-Id: If7b4d855c75df58b173f26ef3c90a4a7563166d3
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/arch/x86/boot/cbmem.c | 4 ++++
src/lib/cbmem.c | 2 --
src/lib/cbmem_common.c | 5 +++++
src/lib/dynamic_cbmem.c | 2 --
src/mainboard/google/nyan/romstage.c | 5 -----
src/mainboard/google/nyan_big/romstage.c | 5 -----
src/mainboard/google/nyan_blaze/romstage.c | 5 -----
src/mainboard/via/epia-m850/romstage.c | 1 -
src/soc/intel/fsp_baytrail/romstage/romstage.c | 1 -
9 files changed, 9 insertions(+), 21 deletions(-)
diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c
index bbf70a2..b53745b 100644
--- a/src/arch/x86/boot/cbmem.c
+++ b/src/arch/x86/boot/cbmem.c
@@ -22,6 +22,7 @@
/* FIXME: Remove after CBMEM_INIT_HOOKS. */
#include <cpu/x86/gdt.h>
+#include <console/cbmem_console.h>
#if !CONFIG_DYNAMIC_CBMEM
void get_cbmem_table(uint64_t *base, uint64_t *size)
@@ -75,6 +76,9 @@ void *cbmem_top(void)
void cbmem_run_init_hooks(void)
{
#if !defined(__PRE_RAM__)
+ /* Relocate CBMEM console. */
+ cbmemc_reinit();
+
move_gdt();
#endif
}
diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c
index 5f834b7..ba6560c 100644
--- a/src/lib/cbmem.c
+++ b/src/lib/cbmem.c
@@ -23,7 +23,6 @@
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
-#include <console/cbmem_console.h>
#include <arch/early_variables.h>
#if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__)
#include <arch/acpi.h>
@@ -256,7 +255,6 @@ static void init_cbmem_post_device(void *unused)
#else
cbmem_recovery(0);
#endif
- cbmemc_reinit();
}
BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = {
diff --git a/src/lib/cbmem_common.c b/src/lib/cbmem_common.c
index 438fd7f..1630628 100644
--- a/src/lib/cbmem_common.c
+++ b/src/lib/cbmem_common.c
@@ -20,6 +20,9 @@
#include <cbmem.h>
#include <stdlib.h>
+/* FIXME: Remove after CBMEM_INIT_HOOKS. */
+#include <console/cbmem_console.h>
+
#ifndef __PRE_RAM__
static const struct cbmem_id_to_name cbmem_ids[] = { CBMEM_ID_TO_NAME_TABLE };
@@ -52,6 +55,8 @@ void cbmem_print_entry(int n, u32 id, u64 base, u64 size)
#if !IS_ENABLED(CONFIG_ARCH_X86)
void cbmem_run_init_hooks(void)
{
+ /* Relocate CBMEM console. */
+ cbmemc_reinit();
}
void __attribute__((weak)) cbmem_fail_resume(void)
diff --git a/src/lib/dynamic_cbmem.c b/src/lib/dynamic_cbmem.c
index ce4e625..a5f2fc2 100644
--- a/src/lib/dynamic_cbmem.c
+++ b/src/lib/dynamic_cbmem.c
@@ -21,7 +21,6 @@
#include <bootmem.h>
#include <console/console.h>
#include <cbmem.h>
-#include <console/cbmem_console.h>
#include <string.h>
#include <stdlib.h>
#include <arch/early_variables.h>
@@ -426,7 +425,6 @@ void *cbmem_entry_start(const struct cbmem_entry *entry)
static void init_cbmem_pre_device(void *unused)
{
cbmem_initialize();
- cbmemc_reinit();
}
BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = {
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index 4e02365..749b87d 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -25,7 +25,6 @@
#include <device/device.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <console/cbmem_console.h>
#include <console/console.h>
#include <mainboard/google/nyan/reset.h>
#include <romstage_handoff.h>
@@ -224,10 +223,6 @@ static void __attribute__((noinline)) romstage(void)
configure_ec_spi_bus();
configure_tpm_i2c_bus();
-#if CONFIG_CONSOLE_CBMEM
- cbmemc_reinit();
-#endif
-
vboot_verify_firmware(romstage_handoff_find_or_add());
timestamp_add(TS_START_COPYRAM, timestamp_get());
diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c
index 4e02365..749b87d 100644
--- a/src/mainboard/google/nyan_big/romstage.c
+++ b/src/mainboard/google/nyan_big/romstage.c
@@ -25,7 +25,6 @@
#include <device/device.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <console/cbmem_console.h>
#include <console/console.h>
#include <mainboard/google/nyan/reset.h>
#include <romstage_handoff.h>
@@ -224,10 +223,6 @@ static void __attribute__((noinline)) romstage(void)
configure_ec_spi_bus();
configure_tpm_i2c_bus();
-#if CONFIG_CONSOLE_CBMEM
- cbmemc_reinit();
-#endif
-
vboot_verify_firmware(romstage_handoff_find_or_add());
timestamp_add(TS_START_COPYRAM, timestamp_get());
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index 480abd6..a23937e 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -25,7 +25,6 @@
#include <device/device.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <console/cbmem_console.h>
#include <console/console.h>
#include <mainboard/google/nyan/reset.h>
#include <romstage_handoff.h>
@@ -224,10 +223,6 @@ static void __attribute__((noinline)) romstage(void)
configure_ec_spi_bus();
configure_tpm_i2c_bus();
-#if CONFIG_CONSOLE_CBMEM
- cbmemc_reinit();
-#endif
-
#if CONFIG_VBOOT2_VERIFY_FIRMWARE
// vboot_create_handoff((void *)CONFIG_VBOOT_WORK_BUFFER_ADDRESS);
#else
diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c
index b6e3635..8912d13 100644
--- a/src/mainboard/via/epia-m850/romstage.c
+++ b/src/mainboard/via/epia-m850/romstage.c
@@ -31,7 +31,6 @@
#include <cpu/x86/bist.h>
#include <string.h>
#include <timestamp.h>
-#include <console/cbmem_console.h>
#include <northbridge/via/vx900/early_vx900.h>
#include <northbridge/via/vx900/raminit.h>
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index ad42e73..b0b8133 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -43,7 +43,6 @@
#include <version.h>
#include <pc80/mc146818rtc.h>
#include <device/pci_def.h>
-#include <console/cbmem_console.h>
/* Return 0, 3, 4 or 5 to indicate the previous sleep state. */
uint32_t chipset_prev_sleep_state(uint32_t clear)
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