[coreboot-gerrit] Patch set updated for coreboot: 4b63f96 nvidia/ck804: Fix FTBFS with AMD Family 10h systems

Timothy Pearson (tpearson@raptorengineeringinc.com) gerrit at coreboot.org
Sun Jan 25 00:29:07 CET 2015


Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8269

-gerrit

commit 4b63f9655b9c9a7487c7bbd9109c323778b9be30
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Fri Jan 23 20:29:46 2015 -0600

    nvidia/ck804: Fix FTBFS with AMD Family 10h systems
    
    Change-Id: I85d005edba44c503c49917d4b928e5c9c5900059
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
 src/southbridge/nvidia/ck804/early_setup_car.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c
index 9ba98c9..8a9c4c5 100644
--- a/src/southbridge/nvidia/ck804/early_setup_car.c
+++ b/src/southbridge/nvidia/ck804/early_setup_car.c
@@ -1,6 +1,8 @@
 /*
  * This file is part of the coreboot project.
  *
+ * Copyright (C) 2015 Timothy Pearson <tpearson at raptorengineeringinc.com>, Raptor Engineering
+ *
  * Copyright (C) 2004 Tyan Computer
  * Written by Yinghai Lu <yhlu at tyan.com> for Tyan Computer.
  *
@@ -18,6 +20,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#if IS_ENABLED( CONFIG_NORTHBRIDGE_AMD_AMDK8 )
 static int set_ht_link_ck804(u8 ht_c_num)
 {
 	unsigned vendorid = 0x10de;
@@ -46,6 +49,7 @@ static void setup_ss_table(unsigned index, unsigned where, unsigned control,
 	val |= 1;
 	outl(val, control);
 }
+#endif
 
 #define ANACTRL_IO_BASE 0x3000
 #define ANACTRL_REG_POS 0x68
@@ -297,6 +301,7 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
 			PCI_DEV(busn[j], CK804B_DEVN_BASE, 0), io_base[j]);
 	}
 
+#if IS_ENABLED( CONFIG_NORTHBRIDGE_AMD_AMDK8 )
 	for (j = 0; j < ck804_num; j++) {
 		/* PCI-E (XSPLL) SS table 0x40, x044, 0x48 */
 		/* SATA  (SPPLL) SS table 0xb0, 0xb4, 0xb8 */
@@ -314,6 +319,7 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
 			       io_base[j] + ANACTRL_IO_BASE + 0xc8,
 			       cpu_ss_tbl, 64);
 	}
+#endif
 }
 
 static int ck804_early_setup_x(void)
@@ -340,7 +346,11 @@ static int ck804_early_setup_x(void)
 	ck804_early_setup(ck804_num, busn, io_base);
 	ck804_early_clear_port(ck804_num, busn, io_base);
 
+#if IS_ENABLED( CONFIG_NORTHBRIDGE_AMD_AMDK8 )
 	return set_ht_link_ck804(4);
+#else
+	return 0;
+#endif
 }
 
 void hard_reset(void)



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