[coreboot-gerrit] Patch set updated for coreboot: 36cf8e1 samus: Delay bringing SSD out of reset

Marc Jones (marc.jones@se-eng.com) gerrit at coreboot.org
Mon Jan 19 02:01:14 CET 2015


Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8215

-gerrit

commit 36cf8e1901ab89e20579625fa134bcaace785e59
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Tue Jul 15 13:41:18 2014 -0700

    samus: Delay bringing SSD out of reset
    
    In order to ensure that we meet timing requirements for the SSD
    power sequencing delay bringing the SSD out of reset until after
    memory training.
    
    BUG=chrome-os-partner:29914
    BRANCH=None
    TEST=build and boot on samus
    
    Original-Change-Id: I807e3d3698255287c3fe7219f44e8ec9a0985df1
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/208155
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    (cherry picked from commit 1cf557049c49e1ba11ade1eee7a45fc2b075ff3d)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: Ib39a14a03e04a167fab45b58b3bc840eb4bcf317
---
 src/mainboard/google/samus/gpio.h     | 3 ++-
 src/mainboard/google/samus/romstage.c | 3 +++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/google/samus/gpio.h b/src/mainboard/google/samus/gpio.h
index c2f5fde..806804c 100644
--- a/src/mainboard/google/samus/gpio.h
+++ b/src/mainboard/google/samus/gpio.h
@@ -23,6 +23,7 @@
 #include <broadwell/gpio.h>
 
 #define SAMUS_GPIO_PP3300_AUTOBAHN_EN	23
+#define SAMUS_GPIO_SSD_RESET_L		47
 
 static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 0: UNUSED */
@@ -72,7 +73,7 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 44: UNUSED */
 	PCH_GPIO_PIRQ,          /* 45: DSP_INT (PIRQN) */
 	PCH_GPIO_PIRQ,          /* 46: HOTWORD_DET_L (PIRQO) */
-	PCH_GPIO_OUT_HIGH,      /* 47: SSD_RESET_L */
+	PCH_GPIO_OUT_LOW,       /* 47: SSD_RESET_L */
 	PCH_GPIO_UNUSED,        /* 48: UNUSED */
 	PCH_GPIO_UNUSED,        /* 49: UNUSED */
 	PCH_GPIO_UNUSED,        /* 50: UNUSED */
diff --git a/src/mainboard/google/samus/romstage.c b/src/mainboard/google/samus/romstage.c
index c0c7200..b26cc4e 100644
--- a/src/mainboard/google/samus/romstage.c
+++ b/src/mainboard/google/samus/romstage.c
@@ -66,6 +66,9 @@ void mainboard_romstage_entry(struct romstage_params *rp)
 	/* Initalize memory */
 	romstage_common(rp);
 
+	/* Bring SSD out of reset */
+	set_gpio(SAMUS_GPIO_SSD_RESET_L, GPIO_OUT_HIGH);
+
 	/*
 	 * Enable PP3300_AUTOBAHN_EN after initial GPIO setup
 	 * to prevent possible brownout.



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