[coreboot-gerrit] Patch set updated for coreboot: 50be8ac vendorcode/amd/agesa: Fix tautological compare
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Wed Jan 14 06:24:36 CET 2015
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8207
-gerrit
commit 50be8acc1f8018bbcb4197c323a57c5fb16545fc
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Wed Jan 14 00:41:44 2015 +1100
vendorcode/amd/agesa: Fix tautological compare
An unsigned enum expression is always strictly positive;
Comparison with '>= 0' is a tautology, hence remove it.
Change-Id: I910d672f8a27d278c2a2fe1e4f39fc61f2c5dbc5
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c | 4 ++--
src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c | 2 +-
src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c | 2 +-
src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c | 2 +-
src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c | 2 +-
src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c | 2 +-
src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c | 2 +-
src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c | 2 +-
src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c | 2 +-
src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c | 2 +-
src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c | 2 +-
src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c | 2 +-
src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c | 2 +-
src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c | 2 +-
src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c | 2 +-
src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c | 2 +-
src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c | 2 +-
src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c | 2 +-
src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c | 2 +-
src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c | 2 +-
src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c | 2 +-
21 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c
index 6469da7..9df3c03 100644
--- a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c
+++ b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c
@@ -169,7 +169,7 @@ MemNCmnGetSetFieldC32 (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
@@ -568,4 +568,4 @@ InitNBRegTableC32 (
LINK_TSEFO (NBRegTable, BFTwrwr, BFTwrwrHi);
LINK_TSEFO (NBRegTable, BFTrdrd, BFTrdrdHi);
-}
\ No newline at end of file
+}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c
index 2ae2b87..dfd5634 100644
--- a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c
+++ b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c
@@ -153,7 +153,7 @@ MemNCmnGetSetFieldDA (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c
index c2fe73c..55658f7 100644
--- a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c
+++ b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c
@@ -156,7 +156,7 @@ MemNCmnGetSetFieldDr (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c
index dba2879..7fd781d 100644
--- a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c
+++ b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c
@@ -169,7 +169,7 @@ MemNCmnGetSetFieldHy (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c
index a7c833b..b4335d6 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c
@@ -172,7 +172,7 @@ MemNCmnGetSetFieldC32 (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c
index 51cbac7..7d5b684 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c
@@ -157,7 +157,7 @@ MemNCmnGetSetFieldDA (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c
index a651d0c..b84006b 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c
@@ -158,7 +158,7 @@ MemNCmnGetSetFieldDr (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c
index 04b6912..8f59d4d 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c
@@ -173,7 +173,7 @@ MemNCmnGetSetFieldHy (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
index 9c52705..ff6e673 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
@@ -159,7 +159,7 @@ MemNCmnGetSetFieldLN (
if (FieldName == BFDctAccessDone) {
// Llano does not support DctAccessDone. Assume DctAccessDone=1 always.
Value = 1;
- } else if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ } else if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c
index c2d0e78..c7b6dcf 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c
@@ -174,7 +174,7 @@ MemNCmnGetSetFieldC32 (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c
index e173bd7..22dcee3 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c
@@ -159,7 +159,7 @@ MemNCmnGetSetFieldDA (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c
index 3983083..b549cba 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c
@@ -160,7 +160,7 @@ MemNCmnGetSetFieldDr (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c
index b8ceff3..a8a1170 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c
@@ -175,7 +175,7 @@ MemNCmnGetSetFieldHy (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c b/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c
index cc4cca6..7915b84 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c
@@ -293,7 +293,7 @@ MemRecNCmnGetSetFieldON (
UINT8 Instance;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c
index 90baa82..17c603f 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c
@@ -173,7 +173,7 @@ MemNCmnGetSetFieldC32 (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c
index ab7a51a..336fb35 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c
@@ -158,7 +158,7 @@ MemNCmnGetSetFieldDA (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c
index 61bd44b..5c6207d 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c
@@ -159,7 +159,7 @@ MemNCmnGetSetFieldDr (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c
index 3b8eda1..90bb9e4 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c
@@ -174,7 +174,7 @@ MemNCmnGetSetFieldHy (
UINT32 Mask;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c
index 7ba37f6..512ef14 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c
@@ -182,7 +182,7 @@ MemNCmnGetSetFieldOr (
UINT8 Instance;
Value = 0;
- if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c
index 05b13aa..ca2afb4 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c
@@ -170,7 +170,7 @@ MemNCmnGetSetFieldTN (
if (FieldName == BFDctAccessDone) {
// No need to poll DctAccessDone for TN due to enhancement in phy
Value = 1;
- } else if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ } else if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c
index 724af40..df810d0 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c
@@ -169,7 +169,7 @@ MemNCmnGetSetFieldKB (
if (FieldName == BFDctAccessDone) {
// No need to poll DctAccessDone for KB due to enhancement in phy
Value = 1;
- } else if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ } else if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);
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