[coreboot-gerrit] New patch to review for coreboot: 2d49eb4 samus: add acpi resource for supporting RT5677 codec
Marc Jones (marc.jones@se-eng.com)
gerrit at coreboot.org
Wed Jan 14 00:01:53 CET 2015
Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8212
-gerrit
commit 2d49eb4b3a389224f05f763a0da933952eea5e77
Author: Kane Chen <kane.chen at intel.com>
Date: Fri Jul 11 16:24:39 2014 -0700
samus: add acpi resource for supporting RT5677 codec
Add codec acpi resource for supporting RT5667 codec.
BUG=chrome-os-partner:29649
TEST=emerge-coreboot successfully
checked codec device is probed
Original-Change-Id: I739c0dbfdbfa221b06f99c3d934825b640096c6b
Original-Signed-off-by: Kane Chen <kane.chen at intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/207707
Original-Reviewed-by: Shawn Nematbakhsh <shawnn at chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
(cherry picked from commit f9698c45a47efe7fd2a1f5432640f3db5e4bd3f0)
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
Change-Id: Ib14b27421613d747e02037ecd2311d9966a5d813
---
src/mainboard/google/samus/acpi/mainboard.asl | 30 +++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/src/mainboard/google/samus/acpi/mainboard.asl b/src/mainboard/google/samus/acpi/mainboard.asl
index eb66818..624aa38 100644
--- a/src/mainboard/google/samus/acpi/mainboard.asl
+++ b/src/mainboard/google/samus/acpi/mainboard.asl
@@ -117,6 +117,36 @@ Scope (\_SB.PCI0.I2C0)
}
}
}
+
+ Device (CODC)
+ {
+ /*
+ * TODO(kane): Need official HID.
+ *
+ */
+ Name (_HID, "RT5677CE")
+ Name (_DDN, "RT5667 Codec")
+ Name (_UID, 1)
+ Name (_CRS, ResourceTemplate()
+ {
+ I2cSerialBus (
+ 0x2c, // SlaveAddress
+ ControllerInitiated, // SlaveMode
+ 400000, // ConnectionSpeed
+ AddressingMode7Bit, // AddressingMode
+ "\\_SB.PCI0.I2C0", // ResourceSource
+ )
+ Interrupt (ResourceConsumer, Edge, ActiveLow){ 30 }
+ })
+ Method (_STA)
+ {
+ If (LEqual (\S1EN, 1)) {
+ Return (0xF)
+ } Else {
+ Return (0x0)
+ }
+ }
+ }
}
Scope (\_SB.PCI0.I2C1)
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