[coreboot-gerrit] New patch to review for coreboot: c5811e6 intel: Drop romstage handoff via scratchpad

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8182

-gerrit

commit c5811e6c8c139b4b9ab874e2792c442f7cfe5830
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Fri Jan 9 09:57:26 2015 +0200

    intel: Drop romstage handoff via scratchpad
    
    If HAVE_ACPI_RESUME ever gets implemented, use CBMEM handoff instead.
    
    Change-Id: I77463988fa5324c729579902f4796be4da15d551
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 .../intel/fsp_sandybridge/northbridge.c            | 21 --------------------
 src/northbridge/intel/sch/northbridge.c            | 23 ----------------------
 2 files changed, 44 deletions(-)

diff --git a/src/northbridge/intel/fsp_sandybridge/northbridge.c b/src/northbridge/intel/fsp_sandybridge/northbridge.c
index a95d736..adc69bc 100644
--- a/src/northbridge/intel/fsp_sandybridge/northbridge.c
+++ b/src/northbridge/intel/fsp_sandybridge/northbridge.c
@@ -329,26 +329,6 @@ static void northbridge_init(struct device *dev)
 	printk(BIOS_DEBUG, "Set BIOS_RESET_CPL\n");
 }
 
-static void northbridge_enable(device_t dev)
-{
-#if CONFIG_HAVE_ACPI_RESUME
-	switch (pci_read_config32(dev, SKPAD)) {
-	case 0xcafebabe:
-		printk(BIOS_DEBUG, "Normal boot.\n");
-		acpi_slp_type=0;
-		break;
-	case 0xcafed00d:
-		printk(BIOS_DEBUG, "S3 Resume.\n");
-		acpi_slp_type=3;
-		break;
-	default:
-		printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n");
-		acpi_slp_type=0;
-		break;
-	}
-#endif
-}
-
 static struct pci_operations intel_pci_ops = {
 	.set_subsystem    = intel_set_subsystem,
 };
@@ -358,7 +338,6 @@ static struct device_operations mc_ops = {
 	.set_resources    = mc_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init             = northbridge_init,
-	.enable           = northbridge_enable,
 	.scan_bus         = 0,
 	.ops_pci          = &intel_pci_ops,
 	.acpi_fill_ssdt_generator = generate_cpu_entries,
diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c
index c552879..92c5467 100644
--- a/src/northbridge/intel/sch/northbridge.c
+++ b/src/northbridge/intel/sch/northbridge.c
@@ -250,26 +250,6 @@ static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
-#if CONFIG_HAVE_ACPI_RESUME
-static void northbridge_init(struct device *dev)
-{
-	switch (pci_read_config32(dev, SKPAD)) {
-	case 0xcafebabe:
-		printk(BIOS_DEBUG, "Normal boot.\n");
-		acpi_slp_type = 0;
-		break;
-	case 0xcafed00d:
-		printk(BIOS_DEBUG, "S3 Resume.\n");
-		acpi_slp_type = 3;
-		break;
-	default:
-		printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n");
-		acpi_slp_type = 0;
-		break;
-	}
-}
-#endif
-
 static struct pci_operations intel_pci_ops = {
 	.set_subsystem = intel_set_subsystem,
 };
@@ -278,9 +258,6 @@ static struct device_operations mc_ops = {
 	.read_resources		= mc_read_resources,
 	.set_resources		= mc_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
-#if CONFIG_HAVE_ACPI_RESUME
-	.init			= northbridge_init,
-#endif
 	.acpi_fill_ssdt_generator = generate_cpu_entries,
 	.scan_bus		= 0,
 	.ops_pci		= &intel_pci_ops,